Measurement of Integrated PA-to-LNA Isolation on Si CMOS Chip

Ryo MINAMI; JeeYoung HONG; Kenichi OKADA; Akira MATSUZAWA

doi:10.1587/transele.E94.C.1057

Special Section on Analog Circuits and Related SoC Integration Technologies

Measurement of Integrated PA-to-LNA Isolation on Si CMOS Chip

Ryo MINAMI, JeeYoung HONG, Kenichi OKADA, Akira MATSUZAWA

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Keywords: CMOS, power amplifier, substrate coupling, Tx leakage, mutual coupling

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2011 Volume E94.C Issue 6 Pages 1057-1060

DOI https://doi.org/10.1587/transele.E94.C.1057

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Abstract

This paper presents measurement of on-chip coupling between PA and LNA integrated on Si CMOS substrate, which is caused by substrate coupling, magnetic coupling, power-line coupling, etc. These components are decomposed by measurements using diced chips. The result reveals that the substrate coupling is the most dominant in CMOS chips and the total isolation becomes less than -50dB with more than 0.4mm PA-to-LNA distance.

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