IEICE Transactions on Electronics
Online ISSN : 1745-1353
Print ISSN : 0916-8524
Regular Section
Design of a Smart CMOS Readout Circuit for Panoramic X-Ray Time Delay and Integration Arrays
Chul Bum KIMDoo Hyung WOOByung Hyuk KIMHee Chul LEE
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2011 Volume E94.C Issue 7 Pages 1212-1219

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Abstract
This paper presents a novel charge transfer CMOS readout circuit for an X-ray time delay and integration (TDI) array with a depth of 64. In this study, a charge transfer readout scheme based on CMOS technology is proposed to sum 64 stages of the TDI signal. In addition, a dead pixel elimination circuit is integrated within a chip, thus resolving the weakness of TDI arrays related to defective pixels. The proposed method is a novel CMOS solution for large depth TDI arrays. Thus, a high signal-to-noise ratio (SNR) can be acquired due to the increased TDI depth. The readout chip was fabricated with a 0.6µm standard CMOS process for a 150×64 CdTe X-ray detector array. The readout circuit was found to effectively increase the charge storage capacity up to 1.6×108 electrons, providing an improved SNR by a factor of approximately 8. The measured equivalent noise charge resulting from the readout circuit was 1.68×104 electrons, a negligible value compared to the shot noise from the detector.
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© 2011 The Institute of Electronics, Information and Communication Engineers
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