抄録
This paper proposes a novel approach for implementing an ultra-low-power voltage reference using the structure of self-cascode MOSFET, operating in the subthreshold region with a self-biased body effect. The difference between the two gate-source voltages in the structure enables the voltage reference circuit to produce a low output voltage below the threshold voltage. The circuit is designed with only MOSFETs and fabricated in standard 0.18-µm CMOS technology. Measurements show that the reference voltage is about 107.5mV, and the temperature coefficient is about 40ppm/°C, at a range from -20°C to 80°C. The voltage line sensitivity is 0.017%/V. The minimum supply voltage is 0.85V, and the supply current is approximately 24nA at 80°C. The occupied chip area is around 0.028mm2.
