IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Online ISSN : 1745-1337
Print ISSN : 0916-8508
Regular Section
Partitioning of Behavioral Descriptions with Exploiting Function-Level Parallelism
Yuko HARAHiroyuki TOMIYAMAShinya HONDAHiroaki TAKADA
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2010 Volume E93.A Issue 2 Pages 488-499

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Abstract

A novel method to efficiently synthesize hardware from a large behavioral description in behavioral synthesis is proposed. For a program with functions executable in parallel, this proposed method determines a behavioral partitioning which simultaneously minimizes the overall datapath area and the complexity of the controller while maximizing performance of a synthesized circuit by fully exploiting function-level parallelism of a behavioral description. This method is formulated as an integer programming problem. Experimental results demonstrate that this method leads to a shift of the explorable design space so that superior solutions which could not be explored by earlier work are included, showing the effectiveness of our proposed method.

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© 2010 The Institute of Electronics, Information and Communication Engineers
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