Fabrication of JFET device on Si (111) for sensor interface array circuit

抄録

In this study, single-sided gate JFET structure on Si (111) has been proposed and investigated for array circuit. The performance of the single-sided gate JFET can be optimized by simulation, and has sufficient performance as sensor interface device. The noise level of the (111) JFET at low frequency was about 1/50 of that of a (111) n-MOSFET, and 1/25 of that of a (100) n-MOSFET. It has been experimentally confirmed that single-sided gate JFET is a suitable device as sensor interface on Si (111), possessing large interface states.