Deadlock-free XY-YX router for on-chip interconnection network

Abstract

Specifically, based on the observation that a response is always preceded by a request in multi-processor SoCs, this letter proposes a novel deadlock-free XY-YX router for on-chip network performance improvement. In order to avoid deadlock, we add additional physical channels in the horizontal direction and optimize the priority of output channel allocation. Simulation results show the enhancement in the throughput of an NoC.