PVT-induced timing error detection through replica circuits and time redundancy in reconfigurable devices

Abstract

This paper studies performance and timing failure probability of time-shifted redundant circuits and path-/circuit-replica circuits. Measurement-based experiments using a fabricated test chip are performed. For an approximately similar false positive error probability for the path-replica and circuit-replica, the false negative error probability of the circuit-replica is approximately two orders of magnitude less than that of the path-replica circuits. When attaining a false negative error of zero, the probability of error detection and re-execution in time-shifted redundant circuits is comparable to, or rather smaller than that of the path-replica circuits.