IEICE Electronics Express
Online ISSN : 1349-2543
LETTER
Variation-resilient pipelined timing tracking circuit for SRAM sense amplifier
Zhengping LiChunyu PengWenjuan LuLijun GuanYouwu TaoXincun JiJunning Chen
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JOURNALS FREE ACCESS

2016 Volume 13 Issue 7 Pages 20150951

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Abstract

A resilient tracking circuit for suppressing the timing variation of SRAM sense amplifier enable (SAE) signal is proposed. Pipelined replica bitline technique is used to favour the desired design. Simulation results show that the cycle time is reduced by ∼27% owing to ∼70% reduction of the standard deviation of SAE at a 1.05 V supply voltage in 28 nm CMOS technology with four-stage pipeline.

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© 2016 by The Institute of Electronics, Information and Communication Engineers
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