High performance bistable weak physical unclonable function for IoT security

抄録

This paper proposes a high performance physical unclonable function (PUF) implemented in a standard 65 nm CMOS process. The PUF cell is derived from SRAM-PUF cell, but it only use the NMOS or PMOS cross coupling structure with two additional access transistors. Random process variations between two cross coupling transistors are digitized to produce one bit output. Post-layout simulation results show that the 2k-bit PUF has high randomness and uniqueness, and it has some excellent features: (1) small PUF cell with a minimum feature size of 240F²; (2) high energy efficiency of 17.3 fJ/b at nominal 1.2 V; (3) excellent stability: only 2.6% bit-error-rate (BER) across a wide temperature range (−40–100 °C) and 10% V_DD variations.