IEICE Electronics Express
Online ISSN : 1349-2543
ISSN-L : 1349-2543
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A 0.4-V 6.6-µW 75-dB SNDR delta-sigma modulator employing gate-body-driven amplifier with local CMFB loop and robust clock generator for implantable biomedical devices
Yan ChenYousheng ChenYan Guo
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2020 年 17 巻 11 号 p. 20200117

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This paper presents an ultra-low-voltage (ULV) high-resolution low-power continuous-time delta-sigma modulator for implantable biomedical devices. The 2nd-order single-bit modulator adopts feed-forward architecture and a new fully differential ULV amplifier to achieve high signal-to-noise plus distortion ratio (SNDR) and power-efficient operation under 0.4-V supply. The amplifier employs a gate-body-input class-AB output topology with a local common-mode-feedback (CMFB) loop to achieve large output swing for less harmonic distortion with low power consumption. A robust clock generator is adopted to ensure modulator’s consistent performances across ±10% power supply variation. The modulator is fabricated in a 130-nm CMOS technology with regular VT transistors. The measurement results show that the modulator achieves 75.5-dB SNDR and consumes 6.6-µW under nominal 0.4-V supply within a 500-Hz bandwidth. The achieved SNDR is the best one among the recent reported DSMs operating at 0.4V or below for implantable biomedical applications. The modulator also achieves a 69dB SNDR with 3.7-µW power consumption even operating at 0.32V supply.

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© 2020 by The Institute of Electronics, Information and Communication Engineers
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