抄録
The stability of adiabatic stepwise charging reversible logic is discussed. In the case of adiabatic logic with asymmetric tank capacitors, we derive a matrix which connects the initial state and the final state after the charge-recycle process. From the analytical discussion, it is proved that the absolute value of the eigen value of the matrix is less than 1. Therefore, it is shown that a step waveform is spontaneously generated after many charge-recycle processes. Next, an adiabatic stepwise charging SRAM is proposed. The SRAM is immune to hot-carrier effects and electromigration even in the less-than-45-nm process, while it maintains an operating voltage of 1V or more. The SRAM is suitable for nanoscale circuits.
