抄録
A transmitter-side spread-spectrum clock generator (TX-SSCG) with a second-order ΔΣ modulator is proposed for a 6-Gbps Serial ATA. Mixed-mode simulations show that a second-order ΔΣ modulator in TX-SSCG reduces the random jitter component of the receiver-side tracking skew through quantization noise shaping. Deterministic jitter is reduced with the loop bandwidth of RXPLL. A 0.13-µm CMOS prototype chip shows that the transceiver operates at 6Gbps over an 8-m SATA cable in TX-SSCG on and off. With TX-SSCG on, the spectrum is down-spread with 11.7-dB peak reduction and 5000-ppm spread amount.
