抄録
A novel dual feedback looped chaotic integrated circuit driven by a three-phase non-overlapping clock is presented. The proposed circuit consists of four MOS switches for S/H (sample and hold), a level shifter and two nonlinear functions for nonlinearity in the feedback. After optimizing of nonlinear functions for chaotic signal generation, the proposed circuit was simulated with SPICE program using a 0.6µm CMOS process parameter. For various control voltages, its chaotic dynamics such as time waveform, frequency spectra and bifurcation diagram were analyzed. We confirmed that the circuit can generate discrete chaotic signals in specific control voltages.
