抄録
This paper introduces a Bilinear Skewed Parallel Memory (BilisPM), which can support multiple conflict-free access types and the circular addressing in X-Y directions of the 2D space. BilisPM features matched Memory Modules (MMs) and can effectively save the on-chip area. We introduce the formal specifications of BilisPM and give its hardware implementation. Experimental results show that BilisPM can reduce the chip area by 22.7% on average (38.1% at most), and its controller consumes smaller chip area at reasonable critical path delay, as compared with the traditional schemes with unmatched MMs.
