抄録
In this paper, a new accurate track and latch comparator circuit is presented. The Offset voltage of latch is compensated by negative feedback loop and the low offset voltage is achieved without pre-amplifiers. The pull up devices in modified regeneration latch is turned off to reduce quiescent current of comparator within the tracking phase. The Monte-Carlo simulation results for the designed comparator in 0.18µm CMOS process show that equivalent input referred offset voltage is 200µV at 1 sigma while it was 26mV at 1 sigma before offset cancellation. The comparator dissipates 400µW from a 1.8V supply while operates in 500MHz clock frequency. The power consumption improvement is up to 33% over previously reported structure.
