Analysis and design of a V-band low-noise amplifier in 90 nm CMOS for 60 GHz applications

抄録

A V-band low-noise amplifier with the gain boosting and noise reduction technique in 90 nm LP CMOS is implemented and tested in this paper. The operation principles of the two techniques are analyzed in detail. The fabricated LNA has a peak gain of 19.8 dB, 3-dB bandwidth of 10.5 GHz and NF of 5.86 dB at 61.5 GHz. Additionally, the reverse isolation of this LNA is better than 50 dB at all frequency. The input and output return losses are both below -10 dB in the China’s 60 GHz unlicensed band (59 - 64 GHz). The total chip size is 0.36 mm² including testing pads.