Embedded heat dissipation structure composed of TSVs gradually shrinking from bottom to top in stacked power chips

抄録

Three-dimensional (3D) integration based on through silicon via (TSV) is one of the most promising technologies in the post-Moore Era. However, increased power density will cause great challenge in heat dissipation and affect the reliability of 3D integrated systems, especially 3D power integrated systems. Except for signal connections, TSV can also be used as thermal conduction pathway. An embedded heat dissipation structure with different size TSVs in different layers of power chips is proposed in this paper. The radius of TSVs in the lower dies is larger than that in the upper dies. Numerical investigation indicates that, compared with the embedded heat dissipation structure with uniform TSV, the proposed structure with the radius of TSVs from top to bottom is 11 μm, 20 μm, and 23 μm, can significantly improve the cooling capability. The volume of heat sink of the proposed structure is much smaller than that of two-dimensional structure. Increasing the number of internal fins has improved heat dissipation effect for the proposed structure.