電気学会論文誌C(電子・情報・システム部門誌)
Online ISSN : 1348-8155
Print ISSN : 0385-4221
ISSN-L : 0385-4221
<電子・集積回路>
ニューロンMOS可変論理回路の提案
石川 洋平深井 澄夫相川 正義
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ジャーナル フリー

2006 年 126 巻 2 号 p. 196-202

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抄録
With the rapid development of integrated circuit technology, reconfigurable circuit attracts much attention. Neuron MOS transistors have been studied as biological neuron-like flexible circuits. Dramatic reduction in the number of transistors and interconnections were achieved by employing the neuron MOS transistors in binary logic circuit designs. This paper proposes the two-input variable logic circuit composed of neuron MOS transistors. The general design technique of the variable logic circuit hasn't been proposed yet. Therefore, as the design technique of the variable logic circuit, the simple neuron MOS comparator is also proposed in this paper. The new design technique using expanded Floating-Gate Potential Diagram (FPD) is shown. A proposed circuit reduces a circuit area drastically in comparison with the conventional circuit. Neuron MOS variable logic circuit is capable of realizing fundamental logic functions. Moreover, 16 kinds of logic functions are realizable by carrying out external signal dynamically. Proposed circuits were fabricated by On-Semiconductor 1.2 μm double-polysilicon CMOS process through VDEC and the circuit operation was experimentally confirmed.
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© 電気学会 2006
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