電気学会論文誌C(電子・情報・システム部門誌)
Online ISSN : 1348-8155
Print ISSN : 0385-4221
ISSN-L : 0385-4221
<電子デバイス>
PtSiを用いたせり上げサリサイドの選択エッチングプロセスとHf混晶化による仕事関数変調
大見 俊一郎高 峻
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ジャーナル フリー

2008 年 128 巻 6 号 p. 900-904

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The selective etching process for elevated self-aligned silicide (salicide) utilizing PtSi has been investigated. We have developed novel selective etching process utilizing a diluted aqua regia followed by a diluted HF light etching. It was found that the residual Pt-rich silicide layers on the sidewall have been successfully removed. We have also investigated a work function modulation of PtSi alloying with Hf. The barrier height for electron of PtSi has been reduced approximately 0.1 eV for PtxHf1-xSi formed by the silicidation of Pt(17 nm)/Hf(4 nm)/Si(100) stacked layer structures.

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