主催: 電気・情報関係学会九州支部連合大会委員会
会議名: 平成29年度電気・情報関係学会九州支部連合大会
回次: 70
開催地: 琉球大学
開催日: 2017/09/27 - 2017/09/28
In recent years, three-dimensional stacked technology attracts attention in LSI such as Field Programmable gate array(FPGA) as a performance improvement method independent of process shrinking.Through-Silicon Via(TSV) is used for vertical wiring in 3D-FPGA.The capacity of TSV varies depending on the number and placement of TSVs. In this paper, We present TSV physical information extraction method to accurately evaluate 3D-FPGA. In addition we deployed TSV in consideration of area and delay and power of 3D-FPGA.