IEICE Electronics Express
Online ISSN : 1349-2543
LETTER
A novel SEU hardened SRAM bit-cell design
Tiehu LiYintang YangJunan ZhangJia Liu
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JOURNALS FREE ACCESS

2017 Volume 14 Issue 12 Pages 20170413

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Abstract

An improved single event upset (SEU) tolerant static random access memory (SRAM) bit-cell with differential read and write capability is proposed. SPICE simulation suggests a more than 1000 times improvement of the critical charge over the standard 6T SRAM cell. With the SEU robustness greatly enhanced at low area and electrical performance costs, the proposed cell is well suited to harsh radiation environment applications such as aerospace and high energy physics.

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© 2017 by The Institute of Electronics, Information and Communication Engineers
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