Journal of The Japan Institute of Electronics Packaging
Online ISSN : 1884-121X
Print ISSN : 1343-9677
ISSN-L : 1343-9677
Technical Paper
Development of Analysis Methodology to Predict the Hysteresis of the Warpage of an Electronic Package during a Thermal History
Akiko OzakiToru IkedaShinya KawaharaNoriyuki MiyazakiTakuya HataoHiroshi NakaidoMasaaki Koganemaru
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2015 Volume 18 Issue 7 Pages 486-494

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Abstract
Electronic plastic packages often show hysteresis of warpage during a thermal cycle. We used finite element analysis (FEM) to analyze the thermal hysteresis of the bottom package of a package-on-package (PoP) system considering the changes in the viscoelastic material properties of the resin due to the thermal history. For the sake of ease, we first analyzed a two-layered test package consisting of a Si chip and underfill (UF) resin, which is epoxy resin containing silica particles. Before analysis, we measured the actual viscoelastic material properties and coefficient of thermal expansion of the UF resin before and after thermal loading using a dynamic mechanical analyzer (DMA) and a thermo-mechanical analyzer (TMA). We changed the viscoelastic material properties during the analysis. We could accurately analyze the thermal hysteresis of the two-layered test chip. Then, we analyzed a test package that imitates the bottom package of a PoP system. We assumed the substrate to be a multi-layered material made of the core material, prepreg, solder-resist resin and a copper layer. In this analysis, the calculated warpage did correspond quantitatively with the measured warpage.
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© 2015 The Japan Institute of Electronics Packaging
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