Abstract
A new wafer-level chip-size-package, which realizes high reliability at low cost, has been developed. The package contains a stress-relaxation layer, so it can achieve a lifetime of over 1000 cycles under a -55/125°C temperature cycling test for its solder joints, even when the package contains a large chip of about 100mm2 and is mounted on a FR-4 motherboard without an underfill assembly. To realize such reliability above, the stress-relaxation layer was optimized, by using finite element analysis, to have a thickness of 75μm and a Young's modulus of 1000 MPa. The stress-relaxation layer is formed by printing to lower the cost of manufacturing the package. The high reliability of the designed package was confirmed experimentally. Under temperature cycling test, none of 50 test samples failed even after 1400 cycles, and the lifetime to 50% failure for the samples was more than 3000 cycles.
