Conventional CCD registers for full frame or frame transfer scheme image sensors have disadvantages such as low light sensitivity due to light absorption in electrodes, high dark current generated at Si-Si0
2 interfaces, and small charge handling capability that results from the surface pinning mode of operation. To solve these problems, we proposed CCD register driven through a barrier in February 2000. The register cell was an inverted version of the photo-diode with a vertical overflow drain that is used as the driving electrode. In simulating the register's characteristics in back illumination mode, we found that all the above-disadvantages disappeared, but the characteristics were rather sensitive to the height, width, and location of SiO
2 film required to isolate electrodes. Therefore, some difficulty remains in fabrication processes. This paper proposes a new version of DTB-CCD where a specific-feature SiO
2 layer covers a part of the barrier surface. This layer not only helps to minimize the structure sensitiveness of performance but also makes it possible to employ the conventional overlapping poly-Silicon electrode process. A thin SiO
2 layer between electrodes and optimized width and thickness of the Si0
2 layer on the barrier minimizes potential barrier height in channels and thus improve transfer efficiency. The simulated charge handling capability of the improved DTB-CCD was 3-4 times greater than that of a two-phase CCD register driven by surface pinning mode.
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