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The 20th JIEP Annual Meeting

Displaying 51-100 of 138 articles from this issue

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Evaluation of electronic characteristics changes in MOSFETs generated by four-point bending method

Masaaki Koganemaru, Toru Ikeda, Noriyuki Miyazaki, Yasutomo Koide, Haj ...

Session ID: 23A-15
Published: 2006
Released on J-STAGE: January 11, 2008

DOIhttps://doi.org/10.11486/ejisso.20.0.103.0

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Effect of Interconnection Structures on Local Residual Stress in a Silicon Chip Mounted by Flip Chip Structure

Nobuki Ueta, Hideo Miura

Session ID: 23A-16
Published: 2006
Released on J-STAGE: January 11, 2008

DOIhttps://doi.org/10.11486/ejisso.20.0.105.0

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Evaluation of Electric and Mechanical Characteristics of Micro Bonded Part using Conductive Adhesives

Yukimasa Yoshizawa, Kozo Ikegami

Session ID: 23A-17
Published: 2006
Released on J-STAGE: January 11, 2008

DOIhttps://doi.org/10.11486/ejisso.20.0.107.0

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Improvement on Delay Time Characteristics of Broadside-Coupled Meander Stripline Using Shielding Conductors

Shigeo Nara, Kohji Koshiji

Session ID: 23B-01
Published: 2006
Released on J-STAGE: January 11, 2008

DOIhttps://doi.org/10.11486/ejisso.20.0.109.0

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Study of Communication Performance Degradation by Electromagnetic Interference on Ubiquitous Equipment

Hironori Okaniwa, Takehiro Takahashi, Takasi Sakusabe, Noboru Schibuya

Session ID: 23B-02
Published: 2006
Released on J-STAGE: January 11, 2008

DOIhttps://doi.org/10.11486/ejisso.20.0.111.0

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Reproduction of Inout Signal on Microstripline

Atsushi Hoshi, Hirooki Aoki, Kohji Koshiji

Session ID: 23B-03
Published: 2006
Released on J-STAGE: January 11, 2008

DOIhttps://doi.org/10.11486/ejisso.20.0.113.0

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The Evaluation Method for Self-Jamming on Digital Communication Systems

Keigo Hori, Satoshi Kazama, Kaoru Gotoh, Yasushi Matsumoto

Session ID: 23B-04
Published: 2006
Released on J-STAGE: January 11, 2008

DOIhttps://doi.org/10.11486/ejisso.20.0.115.0

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Develoment of method for designing controlled impedance vias

Satoshi Ikeda, Kenichi Higashiura, Akihiro Tanaka

Session ID: 23B-05
Published: 2006
Released on J-STAGE: January 11, 2008

DOIhttps://doi.org/10.11486/ejisso.20.0.117.0

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Measurement of electromagnetic characteristics of the printed trace with magnetic sheet

Takehiro Takahashi, Takashi Sakusabe, Noboru Schibuya, Masazumi Arai

Session ID: 23B-06
Published: 2006
Released on J-STAGE: January 11, 2008

DOIhttps://doi.org/10.11486/ejisso.20.0.119.0

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Effects of signal conductor surface treatment of printed circuit boards of transmission characteristics.

Takahiro Yagi, Kazunori Futamura, Satoru Haga

Session ID: 23B-07
Published: 2006
Released on J-STAGE: January 11, 2008

DOIhttps://doi.org/10.11486/ejisso.20.0.121.0

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Vertical Coil in Printed Circuit -Inductance and Magnetic Field Strength-

Masayoshi Morita, Hirooki Aoki, Kohji Koshiji

Session ID: 23B-08
Published: 2006
Released on J-STAGE: January 11, 2008

DOIhttps://doi.org/10.11486/ejisso.20.0.123.0

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New magnetic near field control/measurement techniques for EMC co-design platform

Masahiro Yamaguchi

Session ID: 23B-09
Published: 2006
Released on J-STAGE: January 11, 2008

DOIhttps://doi.org/10.11486/ejisso.20.0.125.0

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study of effect with NSS for common-mode radiation due to narrow ground plane in a printed circuit board

Tetsushi Watanabe, Sshigeyoshi Yoshida, Osami Wada, Tohlu Matsushima, ...

Session ID: 23B-10
Published: 2006
Released on J-STAGE: January 11, 2008

DOIhttps://doi.org/10.11486/ejisso.20.0.127.0

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Common Mode Noise Reduction Technique for Automobile PCBs

Takanori Unou, Koji Ichikawa, Hiroshi Mizuno, Yuichi Mabuchi, Toru Hay ...

Session ID: 23B-11
Published: 2006
Released on J-STAGE: January 11, 2008

DOIhttps://doi.org/10.11486/ejisso.20.0.129.0

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We have studied the cause of common-mode noise emitted by electroniccomponets in vehicle.Vehicle components made up of a PCB and wiring harnesses were examined inVHF bands, and then one of causes of common-mode current running in theharness has been shown as discordance between the neutral electricpotential of the harness at the connector on the PCB and the electricpotential of the ground plane using equivalent circuit analysis.Noise reduction effects based on this mechanism was demonstarated throughexperiments with a PCB equipped a microcomputer for automobile use.

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Effectiveness of the 20H rule in a PWB design

Tomoaki Yanagawa, Shinichi Ikami, Akihisa Sakurai

Session ID: 23B-12
Published: 2006
Released on J-STAGE: January 11, 2008

DOIhttps://doi.org/10.11486/ejisso.20.0.131.0

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Basic Study on MIMO Radio System by Electromagnetic Field Analysis and Measurement

Manabu Sakuma, Hirooki Aoki, Kohji Koshiji

Session ID: 23B-13
Published: 2006
Released on J-STAGE: January 11, 2008

DOIhttps://doi.org/10.11486/ejisso.20.0.133.0

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Evaluation for FDTD simulation result by using measurements of Radiation pattern and Near-field distribution

Masahiko Sakurada, Hiroshi Tsutagaya, Toshinobu Shoji, Hideji Miyanish ...

Session ID: 23B-14
Published: 2006
Released on J-STAGE: January 11, 2008

DOIhttps://doi.org/10.11486/ejisso.20.0.135.0

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An Analytical model for Calculating EMI Radiations from Power-Bus Structures in PCBs

Manabu Kusumoto, Takashi Harada, Hiroshi Wabuka

Session ID: 23B-15
Published: 2006
Released on J-STAGE: January 11, 2008

DOIhttps://doi.org/10.11486/ejisso.20.0.137.0

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This paper presents the model that analyzes the radiation from thepower-bus of the multilayer printed circuit board. It is shown that the LSI power-bus model is composed of the characteristicof the current source, the equivalent circuit element, and the printedcircuit board of equivalent circuit network.It is shown that the EMI radiation is calculated by the model.The result of the simulation is compared with the experiment result;therefore it has been corresponding in the frequency band of 500MHz or less.

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Making flat antenna with dot-matrixlike directors to array

Seiji Arao, Kohji Koshiji

Session ID: 23B-16
Published: 2006
Released on J-STAGE: January 11, 2008

DOIhttps://doi.org/10.11486/ejisso.20.0.139.0

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Develpment of EMC Macro-Model LECCS from LSI Design Information

Yohei Kondo, Osami Wada, Tomio Sato, Kohtaroh Gotoh, Atsuki Inoue, Ryu ...

Session ID: 23B-17
Published: 2006
Released on J-STAGE: January 11, 2008

DOIhttps://doi.org/10.11486/ejisso.20.0.141.0

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Evaluation technique for GHz High-Speed Differential Signal

Yoshihiro Nishida, Nobuhiro Tsuruta, Yuuichi Sato

Session ID: 23B-18
Published: 2006
Released on J-STAGE: January 11, 2008

DOIhttps://doi.org/10.11486/ejisso.20.0.143.0

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Acid Copper Plating for Via Filling in the Use of Insoluble Anode

Hideki Hagiwara, Ryoichi Kimizuka, ichirou Koiwa, Hideo Honma

Session ID: 23C-01
Published: 2006
Released on J-STAGE: January 11, 2008

DOIhttps://doi.org/10.11486/ejisso.20.0.145.0

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Evaluation of Thick Type Cyanide-Free Immersion Gold Plating

Hajime Terashima, Hiroki Nagashima, Takanori Tsunoda, Minako Kobayashi ...

Session ID: 23C-02
Published: 2006
Released on J-STAGE: January 11, 2008

DOIhttps://doi.org/10.11486/ejisso.20.0.147.0

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Surface Modification of Insulating flexible Resin Using UV for the Metallization

Kumiko Ishikawa, Kiitsi Matsui, Kotoku Inoue, Shuuhei Miura, Ichiro Ko ...

Session ID: 23C-03
Published: 2006
Released on J-STAGE: January 11, 2008

DOIhttps://doi.org/10.11486/ejisso.20.0.149.0

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UNIFORMITY OF ELECTROLESS COPPER PLATING FOR HIGH ASPECT THROUGH-HOLES IN PCB

koutoku inoue, masahiro oji, Takayuki Higuchi, Tomoyuki Miyazaki, Kent ...

Session ID: 23C-04
Published: 2006
Released on J-STAGE: January 11, 2008

DOIhttps://doi.org/10.11486/ejisso.20.0.151.0

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Report of NEDO Project from the standpoint of Electric Reliability

Sachio Yoshihara

Session ID: 23C-05
Published: 2006
Released on J-STAGE: January 11, 2008

DOIhttps://doi.org/10.11486/ejisso.20.0.153.0

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In-situ measurement of stress during metal deposition

Kimiko Oyamada, Kaneaki Motohashi, Chikako Takahashi, Katsunori Akiyam ...

Session ID: 23C-06
Published: 2006
Released on J-STAGE: January 11, 2008

DOIhttps://doi.org/10.11486/ejisso.20.0.157.0

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Characteristics of wet etching of copper for printed circuit board by using ferric chloride solution.

Daiki Takahashi, Kazutoshi Matsumura, Katsutoshi Matsumoto, Shoji Tani ...

Session ID: 23C-07
Published: 2006
Released on J-STAGE: January 11, 2008

DOIhttps://doi.org/10.11486/ejisso.20.0.159.0

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New technology of making narrow land patterns.

Munetoshi Irisawa, Yasuo Kaneda, Yuji Toyoda, Katsuya Fukase, Toyoaki ...

Session ID: 23C-08
Published: 2006
Released on J-STAGE: January 11, 2008

DOIhttps://doi.org/10.11486/ejisso.20.0.161.0

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The high frequency transmission mesurement of the paste via in a polyimide multilayered board made by gang operation

Naoyuki Ozawa, Ito Shoji, Sato Masakazu, Watanabe Hirohito, Nakao Osam ...

Session ID: 23C-09
Published: 2006
Released on J-STAGE: January 11, 2008

DOIhttps://doi.org/10.11486/ejisso.20.0.163.0

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Multilayer FPC "SBic" with Filled-via Structure

Toshiaki Chuma, Toshio Komiyatani, Mikihiko Ishibashi, Masayoshi Kondo ...

Session ID: 23C-10
Published: 2006
Released on J-STAGE: January 11, 2008

DOIhttps://doi.org/10.11486/ejisso.20.0.165.0

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A New Pattern Formation on LTCC Using with Dry Film

Kyohei Yamashita, Rie Nagashima, Fumio Uchikoba

Session ID: 23C-11
Published: 2006
Released on J-STAGE: January 11, 2008

DOIhttps://doi.org/10.11486/ejisso.20.0.167.0

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[title in Japanese]

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Session ID: 23C-12
Published: 2006
Released on J-STAGE: January 11, 2008

DOIhttps://doi.org/10.11486/ejisso.20.0.169.0

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Research of high-effeciency of desmear process by plasma

Takahiro Kurahashi, Kiyotaka Kato

Session ID: 23C-13
Published: 2006
Released on J-STAGE: January 11, 2008

DOIhttps://doi.org/10.11486/ejisso.20.0.171.0

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Technics of Micro-Mechanical Drilling

suego kobayashi, Hidehito Watanabe

Session ID: 23C-14
Published: 2006
Released on J-STAGE: January 11, 2008

DOIhttps://doi.org/10.11486/ejisso.20.0.173.0

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Reconstruction of 3-D shape of electronic assembly parts

yasuhiko hara, kenji shirai, yoshikazu kobayashi

Session ID: 23C-15
Published: 2006
Released on J-STAGE: January 11, 2008

DOIhttps://doi.org/10.11486/ejisso.20.0.175.0

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Deterioration Phenomenon in Insulation layer for THB Test

Kenji Okamoto, kaori Fukunaga, Takashi Maeno

Session ID: 24A-01
Published: 2006
Released on J-STAGE: January 11, 2008

DOIhttps://doi.org/10.11486/ejisso.20.0.177.0

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The study of copper migration with FR-4 PWB which has very narrow pitch through holes.

Tomio Fukuda, Hikari Murai

Session ID: 24A-02
Published: 2006
Released on J-STAGE: January 11, 2008

DOIhttps://doi.org/10.11486/ejisso.20.0.179.0

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Ionic Migration Behaviour in Fine Pitch Wiring on Flexible Print Circuit

sanae ISAWA, Mitsuru CHINO, Hidekazu HARA, kouji TAMAYAMA, Yuji KIMURA ...

Session ID: 24A-03
Published: 2006
Released on J-STAGE: January 11, 2008

DOIhttps://doi.org/10.11486/ejisso.20.0.181.0

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Above all, flexible print circuit has been paid attention especially in the field of notebook computer and the cellular phone for obtaining higher degree of freedom in design. The insulation failure due to an ionic migration damage advanced in a fine pitch wire mounting becomes serious problem. Therefore, the analysis of migration behaviour in FPC becomes important for evaluating the reliability of an electronic devices based on FPC. In this research, the THB testing was conducted using COF as a sample to understand the ionic migration behaviour in FPC. Then, investigation concerning generated ionic migration behaviour was conducted employing SEM and EDX. In addition, some trials were conducted for establishing the evaluation method of ionic migration behaviour.

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Investigation of ion migration in COF substrate

Yasunori Matsumura, Tomoaki Sugaya

Session ID: 24A-04
Published: 2006
Released on J-STAGE: January 11, 2008

DOIhttps://doi.org/10.11486/ejisso.20.0.183.0

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Warpage analysis in multilayer flexible print circuit using sheet type adhesive

Kiyoshi Miyake, Satoshi Tanigawa

Session ID: 24A-05
Published: 2006
Released on J-STAGE: January 11, 2008

DOIhttps://doi.org/10.11486/ejisso.20.0.185.0

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A reduction of residual stress and warpage of the laminated product is essential issue in the multi-mounted package or multilayer substrate. In this paper, an interesting phenomenon of warpage was analyzed in the multilayer flexible substrate using sheet type adhesive. Although the two types of adhesive specimens were almost same in the mechanical properties, there was a large difference between the warpage of their laminated substrates bonded with a same flexible film. From the stress analyses, it was found that the real bonding temperature and the adhesiveness (friction) before full bonding between the adhesive and their substrate affected the large difference of warpage.

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The Effect of Heat Spreader on Package Warpage

Tomohiro Noguchi, Masazumi Amagai

Session ID: 24A-06
Published: 2006
Released on J-STAGE: January 11, 2008

DOIhttps://doi.org/10.11486/ejisso.20.0.187.0

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The estimation of the erosion behavior of stainless steel by lead-free solder using CT-scan

Syouai Kou, Tadasi Takemoto, Hirosi Nisikawa

Session ID: 24A-07
Published: 2006
Released on J-STAGE: January 11, 2008

DOIhttps://doi.org/10.11486/ejisso.20.0.189.0

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Study of Repressing the Tin Whisker Growth using electrodeposition with choping current

Kazutaka Habu, Yoshihisa Watanabe, Satoko Hiraka, Tomoya Kiga

Session ID: 24A-08
Published: 2006
Released on J-STAGE: January 11, 2008

DOIhttps://doi.org/10.11486/ejisso.20.0.191.0

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Obsevation of hydrogen plasma reflow process using lead-free solder printed paste

Shuichi Nishi, Eiji Higurashi, Tadatomo Suga, Taizo Hagihara, Tatsuya ...

Session ID: 24A-09
Published: 2006
Released on J-STAGE: January 11, 2008

DOIhttps://doi.org/10.11486/ejisso.20.0.193.0

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The research of the flux for Pb free for the soldering based on the organic phosphorous acid

Naoki Okada, Ryuichi Shiba

Session ID: 24A-10
Published: 2006
Released on J-STAGE: January 11, 2008

DOIhttps://doi.org/10.11486/ejisso.20.0.195.0

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Surface Reforming of ABS Resin Using Large-size UV Light System

Katsuhiko Tashiro, Hiroyuki Seida, Masaharu Sugimoto, Takeshi Bessho, ...

Session ID: 24A-11
Published: 2006
Released on J-STAGE: January 11, 2008

DOIhttps://doi.org/10.11486/ejisso.20.0.197.0

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Wafer-level three-dimensional integration technology

Takafumi Fukushima, Yusuke Yamada, Hirokazu Kikuchi, Tetsu Tanaka, Mit ...

Session ID: 24A-12
Published: 2006
Released on J-STAGE: January 11, 2008

DOIhttps://doi.org/10.11486/ejisso.20.0.199.0

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[title in Japanese]

[in Japanese], [in Japanese], [in Japanese], [in Japanese]

Session ID: 24A-13
Published: 2006
Released on J-STAGE: January 11, 2008

DOIhttps://doi.org/10.11486/ejisso.20.0.201.0

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Optimal design of channel structure for liquid cooling system

Tomotaka Ishida, Minoru Yoshikawa, Sakae Kitajo

Session ID: 24A-14
Published: 2006
Released on J-STAGE: January 11, 2008

DOIhttps://doi.org/10.11486/ejisso.20.0.203.0

CONFERENCE PROCEEDINGS FREE ACCESS

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