The single-phase diode rectifier offers several desirable features such as a simple topology, low high-frequency noise, high reliability, and high environmental durability. However, diode rectifiers produce undesirable lower-order harmonics in the input current. To overcome this problem, the author proposes a single-phase voltage-doubler diode rectifier without active switching devices, which meets to the regulation of IEC 61000-3-2 (Class A). In this paper, the author presents the validity of the proposed rectifier (3.5kW, 230V/50Hz) from experimental results.
For the control of permanent magnet synchronous motors, speed control, current control, sensorless control exist, and control gain design is required. In general, the control gain needs to be designed in consideration of stability and responsibility, and various researches have been conducted on this.
In this paper, the influence of the control band of the three types of control on the stability is analyzed by combining the analysis of the pole placement of the closed-loop transfer function and stability judgment considering the axial error which is the difference between the actual position and the estimated position, the relationship between each control band that can secure the results is discussed.
This paper describes a modeling method of conducted noise on an AC/DC converter using SiC devices. The simulation is performed by deriving an equivalent circuit from the measurement result of leakage current. By comparing the simulation and measurement results, the usefulness and validity of the proposed simulation method is confirmed.
Recently, research and development of SiC power devices have been done, and SiC power devices have become commercially available. The SiC power devices are suitable for realizing to medium voltage applications. Since, the voltage rating of commercial power devices is limited to less than 1.2kV, they should be connected in series to maintain a higher voltage rating. However parasitic parameters of these devices are not the same, and therefore the voltage sharing during turn-off operations cannot be controlled. This paper proposes a digital control for the voltage balancing of series connected SiC-MOSFETs during turn-off operations. In order to compensate the voltage unbalance conditions, this paper presents a time-adjustment gate-drive circuit using a digital delay line; experimental results for the feedback control using a buck chopper circuit are also presented.
In recent years, the use of electric power has been rapidly increasing. Therefore, maintenance of distribution lines is important. Accidents of the distribution system are mainly earth faults. Consequently, an earth fault detection technique is required. On the other hand, due to the development of power electronics, distortion of the low voltage level power line occurs. In the Ior method, which is currently the mainstream method for earth fault detection, the earth fault current is calculated by a vector computation method in order to eliminate the earth capacitance of the line. However, in an actual distribution system, distortion has occurred in the line; therefore, we the current Ior method causes a large error in calculating the effective earth fault current.
In railways where trains run densely, once a delay occurs, the delay easily propagates to other trains. In order to make their timetables more robust, railway companies are taking various steps. However, to date they have not been interested in the analysis of drivers' operation, although this factor is closely related with the robustness. It would be useful to know the difference between “good driving”, which reduces delay and “poor driving”, which increases delay so that we can give advice to drivers for improvement of their driving. We have developed an algorithm to find the factors that differentiate between “good” and “poor” driving based on the decision tree. The inputs of our algorithm are track occupation records. The algorithm receives “good” examples and “poor” examples as the input, and then produces a decision tree from which we can determine the dominant factors to differentiate between the good examples and the poor examples. We have applied our algorithm to actual data and found a driving pattern that is common to poor drivers. Then based on the results, we improved signaling systems and learned that we succeeded in improving the robustness of the timetable.
This paper proposes a filter design for improving the control performance of the current control system of Permanent Magnet Synchronous Motors (PMSMs) using the overmodulation region of an inverter. The control performance of a vector control system for PMSMs using the overmodulation region of an inverter can be improved by suppressing harmonic components that are generated in this region. This paper utilizes Band Elimination Filter (BEF) to eliminate harmonic components; however, unsuitable BEF setting leads to generation of large current oscillation at the resonant frequency of current feedback loop with BEF. In order to deal with these problems, the proposed filter design focuses on gain setting at the cutoff frequency of BEF. The proposed filter design can prevent the generation of current oscillation at the resonant frequency of the system, and can improve current control performance without complex adjustments. Simulations and experiments are carried out to show the effectiveness of the proposed BEF setting.