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Takashi Nishioka, Shin-ichiro Iwanaga
Session ID: 18A-13
Published: 2005
Released on J-STAGE: April 20, 2005
CONFERENCE PROCEEDINGS
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Koichi Fujimoto, Masakazu Yoshizawa
Session ID: 18A-14
Published: 2005
Released on J-STAGE: April 20, 2005
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Kiyotaka Komori, Shoji Hashimoto, Mitsuyoshi Nishino, Hiroaki Fujiwara
Session ID: 18A-15
Published: 2005
Released on J-STAGE: April 20, 2005
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Hiroaki Wakabayashi, Masataka Arai, Takeshi Hosomi
Session ID: 18A-16
Published: 2005
Released on J-STAGE: April 20, 2005
CONFERENCE PROCEEDINGS
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Takayoshi Masaki, Akihiko Tobisawa
Session ID: 18A-17
Published: 2005
Released on J-STAGE: April 20, 2005
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Kazuhiro Murata, Hiroko Sagisaka, Kensyu Oyama
Session ID: 18B-01
Published: 2005
Released on J-STAGE: April 20, 2005
CONFERENCE PROCEEDINGS
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Shuichi Mitoma, Kazuhiko Yasuhara, Shinichi Hanada, Shinji Shirakawa
Session ID: 18B-02
Published: 2005
Released on J-STAGE: April 20, 2005
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naoya sato, hiroyuki ishikawa, takahiro imai, akihito narita, kazuyosh ...
Session ID: 18B-03
Published: 2005
Released on J-STAGE: April 20, 2005
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We developed fine-pitch COF joint technology by Au-Sn joints.As a result, it was confirmed that an excellent Au-Sn alloy was formed with the selection of the best temperature of the bonding tool.Moreover,it was confirmed to correspond to the fine-pitch connection by using the circuit board of the best material.
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Hiroshi Ikeda, Shigeyuki Hoshikawa
Session ID: 18B-04
Published: 2005
Released on J-STAGE: April 20, 2005
CONFERENCE PROCEEDINGS
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Akira Ohuchi, Tomoo Murakami
Session ID: 18B-05
Published: 2005
Released on J-STAGE: April 20, 2005
CONFERENCE PROCEEDINGS
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Seiichi Denda
Session ID: 18B-06
Published: 2005
Released on J-STAGE: April 20, 2005
CONFERENCE PROCEEDINGS
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Kiyokazu Yasuda
Session ID: 18B-07
Published: 2005
Released on J-STAGE: April 20, 2005
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Makoto Miyazaki, Shigeyuki Ogata, Akio Yoshida, Yoshihiro Nishiyama, H ...
Session ID: 18B-08
Published: 2005
Released on J-STAGE: April 20, 2005
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Hiroshi Nishikawa, Tatsuhiko Kobayashi, Tadashi Takemoto
Session ID: 18B-09
Published: 2005
Released on J-STAGE: April 20, 2005
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Katsunori Okazaki, Kenji Watanabe, Kaori Nakayama, Naho Uchida, Takehi ...
Session ID: 18B-10
Published: 2005
Released on J-STAGE: April 20, 2005
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Ichiro Koiwa, Kinya Ashikaga, Makoto Terui, Yasushi Shiraishi, Noritak ...
Session ID: 18B-11
Published: 2005
Released on J-STAGE: April 20, 2005
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Recentry, many electronic devices have been used as an mobile tools. Therefore, both downsizing and iincreasing mounted electric element to improve are strongly required. Too many passive element limits above demand by decreasing mounteing area. To solve this problem, embedded passive elements are proposed especially for capasitor. In this papaer, a thin film capasitor for embedded is manufactured by using semiconductor porocess technology and good characteristics is obtained.
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Mitsuhiro Watanabe, Ichiro Koiwa, Kinya Ashikaga, Makoto Terui, Yasush ...
Session ID: 18B-12
Published: 2005
Released on J-STAGE: April 20, 2005
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We made the capacitor chip by using the semiconductor processing technology. In this report, we report on the result of mounting on the print circuit board and the result of burying this chip in the print circuit board.
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Hiroki Yabe, Chie Sasaki, Yasushi Ono, Hiroyoshi Tagi, Seiji Karashima ...
Session ID: 18B-13
Published: 2005
Released on J-STAGE: April 20, 2005
CONFERENCE PROCEEDINGS
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Satoshi Tsukiyama, tetsuya sugimoto, kazuhiko iwami, Yasuhide Oono, yu ...
Session ID: 18B-14
Published: 2005
Released on J-STAGE: April 20, 2005
CONFERENCE PROCEEDINGS
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Ryuji Sekimoto, Naohito Nakaya, Hideaki Kobuna
Session ID: 18B-15
Published: 2005
Released on J-STAGE: April 20, 2005
CONFERENCE PROCEEDINGS
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Naoki Sakota, Tomotoshi Sato, Hiroshi Matsubara
Session ID: 18B-16
Published: 2005
Released on J-STAGE: April 20, 2005
CONFERENCE PROCEEDINGS
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In recent years,mobile apparatus,such as mobile phones and PDAs,have become increasingly smaller and with more functions.For mounting LSIs in mobile apparatus,a method that enables high pin count and narrow pin pitch LSI bonding is needed.So,we have developed ultrasonic flip-chip bonding process for pin count and narrow pin pitch LSI bonding on PWBs(printed wiring boards). Based on the experiment date,we investigated the relationship between the 2-step bonding process and the conventional bonding process. Test chips bonded using this process have good bondability.It is confirmed that this process is applicable for high pin count and narrow pin pitch LSI JISSO.
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