[in Japanese]

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In order to comply with the EU RoHS directive scheduled in July 2006, we've developed the new solder evaluation technique for the printed-circuit board unit. This is non-destructive technique based on x-ray fluorescence mapping analysis, determines if lead contained in the solder excesses over allowable limits. Although the printed-circuit board unit consists of various materials, using this technique, we can discriminate between the unacceptable material containing lead such as solder, and the acceptable materials containing lead such as glass and electronic ceramics, by seeking the overlaps with the coexisting element's distribution. Fujitsu started to check the purchased printed-circuit board units with this solder evaluation system.

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Anodic Bonding is a bonding technology for glasses and Si or Metals and widely used in MEMS field for producing sensors. Generally, bonding is performed at around 400deg and this high temperature restricts materials on the bonding samples, such as solders. So low temperature anodic bonding is developed to realize the anodic bonding below the melting point of solders. The results are summarized as follows:(1) Forming electrode metallization on glass wafers accelerates ions drifting and advance bonding at low temperature. (2) Anodic bonding with glass and Al metallization on Si showed high bonding strengths. Strengths of 200deg bonded samples were almost same level as 400deg. (3) Al diffusion in glass and reaction at bonding interface were observed using TEM.

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[in Japanese]

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Through wafer vias plugged with solder for RF interconnection are described. Molten solder ejection method is a maskless full-dry process and it was shown that the plugging solder was voidless and hermeticity was expected. Waveguide patterns can be formed on both sides of silicon substrates without a planarization process using a standard spin-on photoresist lithography. RF transmittance of coplanar waveguides with through wafer interconnects was measured up to 100 GHz and it agreed well with calculation.

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[in Japanese]

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The more fine pitch IVH(Interstitial Via Hole) is required for High Pin Count LSI packaging using multi-layered substrates. The DENSO's PALAP™ can realize the any layer fine pitch IVH by via-on-via structure. The vias are Sn/Ag sintered metals and lands are copper foils. The new diffusion bonding technology is applied to this structure. The authors explain the adequate ratio of Sn/Ag content for diffusion bonding in hot vacuum pressing. The effects of Sn/Ag ratio on the bonding strength between via and copper land have been examined. At the ratio of Sn content from 20 wt% to 60 wt%, the bonding strength is strong. The reliability of the 20 layers Daisy-Chain substrates with various Sn/Ag ratio has been also evaluated.

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Copper filling of the vias for the construction of build-up multilayer has been realized to produce the high-density interconnection. Via filling is already achieved by the selection of additives such as Bis(3-sulfopropyl)disulfidedisodium(SPS) as brightner ,Janes green B (JGB) as leveller and polyethylene glycole(PEG) as polymer in the copper electroplating bath. However, the filling ability of these additives was decreased with the plating time. Accordingly, the depletion or decomposition of additives was evaluated from the electrochemical analysis and the observation of filling ability . As the result, SPS was the most rapidly deteriorated and followed by the JBG. PEG was the most durable among the evaluated additives.

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[in Japanese]

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In order to react to high pattern density in printed boards, copper half-etching technique (HET) has been applied to the manufacturing processes (before the pattern formation process), where the H₂SO₄-H₂O₂ system is used as an etching solution. For the HET, solution control during the etching is complicated, and the production costs become expensive. Consequently, alternative technique of the HET is desirable. We propose a new technique, which is based on chemical mechanical polishing, as the alternative technique. We will reveal the CMP solution characteristics, the mechanism, and the polishing conditions during CMP, and the chemically mechanically polished surface properties.

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For manufacturing small-dimensional PCB such as smaller metal-pitch less than 80 micron, dry process is introduced into conventional wet-process technology. Two types of dry process technology are developed. One of them is low-pressure plasma surface treatment process technology. The other one is atmospheric ozone surface treatment process technology. As application process using both dry process technologies, the process performance is shown in the cases of desmear process, descam process and pre-treatment before Au/Ni-plating.

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In order to evaluate the influence of electromagnetic interference on Ubiquitous Equipment wireless communication signal qualities are measured. The electromagnetic noise was impressed on the equipment under test (EUT) which communicates with the remote computer using wireless LAN.Then degradation of the communication qualities such as throughput and Packet Error Rate (PER) are measured on the remote computer.As the noise impressed position is changed, communication error it does not lead is observed, but malfunction or interruption of communication.Thus, it is suggested that the measurement of communication qualities present the influence of slightly light interference on the EUT.

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[in Japanese]

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Cu-filled conductive pastes (Cu-pastes) have been widely studied as electronic packaging materials due to their lower cost compared to that of Ag-pastes. However, copper is easily oxidized during heating for cure, which increases electrical resistance of Cu conductive pastes. Therefore, the aim of this paper is to improve electrical resistance of Cu-pastes by adding the Low Melting Point Alloys (LMPA) and forming metallurgical bonding among Cu fillers with melted LMPA during curing. The electrical resistance of Cu-pastes was measured and the metallurgical bonding among fillers was investigated by SEM. The electrical resistance of Cu-pastes was found to decrease by metallurgical bonding among Cu fillers by suitable addition of the LMPA and flux into Cu-pastes.

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[in Japanese]

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A new profile-free copper foil has been developed whose surface roughness is Rz <1.5 µm with satisfactory adhesion strength. Provided special surface treatment affords good peel strength (0.7 kN/m or more) equivalent to that for the roughened foil with sufficient reliability.With the new profile-free copper foil, the conventional subtractive method is applicable to the wiring of 60 µm pitch or less, and a short-circuit fault of electroless Ni/Pd/Au plating that is prone to occur in fine wiring could be restrained since a wiring was formed on a smooth surface. Moreover, a transmission loss in a 5GHz band could decrease 8dB/m since the surface roughness of the conductor line was suppressed.

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The mechanism of the peel strength increase between the supporting layer and the very thin copper foil layer after the curing process of polyimide has been studied. The copper atoms migrate through the separation layer and the copper bridge appears in this layer. By sandwiching this layer between the migration preventing layers, the peel strength keeps its original strength.

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[in Japanese]

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The embedded passive technology in circuit boards has been developed in various technology approaches: printed wiring board, low temperature cofired ceramics, MCM-D and so on, to achieve miniaturization, cost reduction, and higher performance in PC and RF wireless communication products. This presentation indicates that the aerosol deposition with which the ceramic film can be deposited at room temperature, is the promising technology satisfied with the requirements of the embedded passive for next generation.

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Today, the IC tends requires the high density interconnect structures. Our new Prepreg "Additive Prepreg R05A0" is one of the best solution for those issues. The material consists of the modified epoxy resin and following characteristics, 1) Excellent processability 2)Halogenated free material, 3)Corresponding to UL 94V-0, 4) Stored at room temperature over 3 months.

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