A new kind of frame transfer CCD imager with a single chip (485^v×572^H) for a 2/3″ size color camera, using a Cross Gate Structure, has been developed. One of the characteristics of the structure is a simple electrode pattern. It ispossible to increase the aperture ratio value.
This device has an added complementary colored (yellow, green and cyan) stripe filter. The horizontal and vertical resolutions are 240 and 350 TV lines, respectively. This imager can be used in 65 lx illumination (F 1.4).

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To reduce smear, a highly resistive MCZ Si substrate is applied to 384H×491V Interline Transfer (IT) CCD Imager.
Since MCZ Si crystal has good controllability of interstitial oxygen concentration and its uniformity, it is possible to use it for highly resistive Si substrate without thermal donor conversion problems.
Measured smear signal levels at 650nm wavelength are 1%, 0.5% and 0.2% for signal level for 12ohm-cm, 40ohm-cm and 120ohm-cm substrates, respectively.
To achieve more effective smear reduction, the P-well was introduced under vertical shift registers. The smear level was reduced to less than 1/10 that of non-P-well devices. Thin poly Si-SiO₂-Si (MOS) sensor structure is also used in this device.
The MOS sensor has no lag characteristics due to complete signal charge transfer into vertical shift registers. Also, it has high spectral sensitivity by the choice of optimum interference effect between thin poly Si-SiO₂-Si structures.

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A 2/3″ inch scheme 384 (H) ×490 (V) element interline CCD image sensor with a new anti-blooming structure was developed. Blooming was suppressed by a vertical overflow drain positioned under, rather than beside, a photodiode without sacrificing photo-sensitivity and dynamic range. Blooming was completely suppressed and smeared signal was reduced to 0.05% of the total signal under 10% vertical height illumination. Well balanced performance, namely, wide dynamic range (72dB), low random noise (65 RMS noise electrons per charge packet), high contrast transfer functions for horizontal and vertical directions and a spectrum response similar to the luminous efficiency curve, was obtained under moderate operating conditions.

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Feasibility of obtaining CCD image sensors with a small image size, such as 1/2 inch or 8mm, has been investigated using the conventional 2/3 inch design and process technology. For estimating the expected characteristics for reduced image size sensors, a 2/3 inch interline transfer CCD was fabricated, in which the horizontal function was designed compatible with a 1/2 inch device. It was deduced that the reduction in the image size, using the 2/3 inch technology, could be made without deteriorating the practical imager performance. Based on these results, an 8 mm size sensor with the FIT-CCD configuration has been designed, fabricated and evaluated. Most of the characteristics obtained are on levels with those expected. Note that the smearing level has been strinkingly lowered, as a result of the FIT-CCD configuration.

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A new CPD area image sensor with the buried channel CPT (Charge Priming Transfer) function has been developed.
The transfer mechanism for the buried channel CPT was simulated by using the potential model. Based on the result, together with the data on the conventional surface channel CPT, a buried CPD with 398^H × 496^V pixels was designed and fabricated using a standard n-channel two-level polysilicon process technology. In this device, the blooming and smear phenomena problems have been solved by introducing overflow-drains and smear-sweeping structure into the device.
The imaging characteristics for the device, which operates in the field-stored mode as well as in the frame-stored mode, are reported in detail.

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A solid state imager, in which the thin-film heterojunction is overlaid on the interline transfer CCD, has been developed. This solid-state imager has several advantages, such as high sensitivity and low smearing signal. However, to reveal its ability fully, operational design, for use between the photoconductor and the CCD scanner, is necessary. In this paper, the device operational designs have been analyzed and tested with the experimental results. Another important problem for this device is the highlight lag. It has been shown to be overcome by signal processing during blanking period. The reproduced image achieved with a single chip color camera is also shown.

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Design considerations for high resolution solid-state imager are presented. Resolution of the imager was investigated in terms of spatial sampling points, considering interlacing methods and pixel arrangements.
The results indicate that the combination of the offset pixel arrangement and the simultaneous double row selecting method is suitable for obtaining high resolution with a limited number of pixels. A 384×485 high resolution MOS area imager was fabricated based on the results. Horizontal and vertical resolutions of 500TV lines and 340 TV lines were obtained, respectively, which confirms the theoretical results.

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In order to get useful information for designing solid state image sensors and camera systems, two dimensional Nyquist limits and modulation transfer functions (MTFs) for solid state image sensors were studied by Fourier transformations of sampling lattices formed with regularly arrayed picture elements and by those for apertures forming an effective photo-sensitive area, respectively.
A rectangular lattice and a rhombohedral lattice were chosen to investigate two dimentional Nyquist limits. In case of 500V×400H pixels imager as of today, the Nyquist limit for the latter was improved about two times that for the former in a horizontal direction, while it decreased in diagonal directions.
A rectangular aperture and L-shaped aperture were examined to give two dimensional MFTs, which were broken down into area maps by drawing contour lines connecting equal MTF values. MTF values were found to increase in directions where the photo-sensitive areas were masked resulting decreased apertures.

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A resolution characteristic for a solid state image sensor is determined by the numbers of picture elements packed in a CCD chip. To improve the resolution, it is proposed to swing the CCD chip right and left in a horizontal direction, so that each photo-diode in the picture element occupies a new imaging spot, which is left without any picture signal if not swung.
Thus, the “Swing CCD” produces a frame picture composed of a signal stored in one field time at one site and that stored in another field time at the new site. This is equivalent to an increase in numbers of picture elements in the horizontal direction, resulting in an enhancement in horizontal resolution by factors of two.
An interline transfer CCD is swung synchronously at frame time frequencies with the aid of piezoelectric bimorph deflectors. Details on the swing DDC structure are reported. Also, an invented signal process method is reported which gives a necessary high resolution picture display without wide band signal processing circuits. Experimental results on black and white pictures are shown. An application for a single chip color camera is discussed.

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A field integration mode frequency interleaving method for CCD color video camera has been studied.
The frequency interleaving is one of the signal processing methods used in the conventional single tube color camera system, and color separation circuit becomes very simple. Furthermore, the field integration mode operation has some superior points, such as no field time lag, wide anti-blooming properties and so on. The color filter arrangements for this operation have been investigated and the existence of 100 varieties was shown. A new color mosaic filter array, consisting of three colors, white, yellow and cyan, was selected out of 100 geometries. Fine picture quality with no field time lag and little moire effect could be obtained.

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A PAL System Color Camera has been developed by using a single-chip MOS imager. The PAL system imager requires 20% increase in horizontal and vertical resolutions, compared to an NTSC imager. Such higher density should decrease the sensitivity and yield.
So, the pixel position was shifted by a half pixel-pitch line by line, Using this unique pixeld disposition has successfully improved the horizontal resolution without increasing the horizontal pixels in number from those for an NTSC imager.
The color camera system using this MOS imager employs the following circuits to support the unique pixel disposition imager; 1) New signal processing circuit which includes video signal delay and sampling. 2) New sync. and drive circuit which operate with independent frequency.

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An improved line sequential color difference system for signal-chip color camera has been developed. It ensured a high quality color video signal. By using this system, not only a large luminance signal but also a large color special modulation rate are obtained. Color error appearing on a vetical color edge inherent in a line sequential color difference system has been reduced.
Applying this system to CPD image sensor, 46 dB luminance S/N ratio and 45 dB of R-Y color difference S/N ratio are obtained under 300 Lx and F 1. 4 conditions.

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A new color separation method for a single chip interline-transfer CCD color camera using a field integration mode has been established.
It is shown that use of the field integration mode can efficiently eliminate a lagged or residual signal from the previous field. Picture flickering near the Nyquist limit in the vertical resolution of CCD output signals is also remarkably suppressed.
A new color filter array, developed for the field integration mode CCD, has brought forth a high total picture quality, being applicable to high performance color cameras for home use

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NHK has developed a new electronic still camera system category. The developed camera has an interline transfer CCD for image sensor and 64Kbit C-MOS static RAM array with back-up battery for picture recording.
In the camera, the output video signal from the CCD is digitized and immediately recorded in the RAM array without any signal processing. After one still picture recording, the RAM array is removed from the camera and attached to the playback equipment.
In the playback equipment a field memory, clocked by the television rate, is provided for the picture display. A micro computer is applied primarily for signal processing, such as color separation, γ-collection and NTSC encode.
The advantage of this new system can be summarised as follows.
1) Camera construction is simplified.
2) By digital signal processing, a high-quality still-picture is obtained.
3) It is suitable for incorporating LSIs.

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