We have developed a 256×256-element HgCdTe hybrid infrared focal plane array for 8-10μm band that is both large scale and highly sensitive. Three new techniques were used to achieve the large scale array. First, a thin silicon readout circuit on a sapphire substrate reduced thermal stress between the HgCdTe diode array on CdZnTe and the Si readout circuit. Second, we optimized cutoff wavelength for maximum sensitivity. Third, a CMOS type readout circuit with an interlace scheme enabled a large handling capacity. We also used a HgCdTe diode array with anodic sulfide (CdS) passivation to reduce dark current and nonuniformity of the photocurrent. Our infrared focal plane array has a noise equivalent temperature difference 0.06 K with F 2.5 optics.

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This paper considers an algorithm that can realize the multiple use for plural fast processors. For this purpose, the fast switching network which connects processors and variable delays is needed. A DPS (Digital Signal Processor) chip model is assumed that includes plural multipliers, arithmetic logic units, variable delays, registers, and a cross point. The algorithm is studied for many examples and confirmed by software simulation. The digital master control system for a broadcast station is studied as an example and the DSP chip model can be very successfully used for the TV master control system Each multiplier, alu, or variable delay is very efficiently assigned and the equipment could be made much smaller.

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The cost-effective transfer of coded video over ATM networks demands that network parameter values be suitably decided for each type of video sequence. This paper first describes the relationship between delay and declared values of peak and average bitrate A video codec control scheme based on this relationship is introduced. Several video sequences used in standardization activities are evaluated from the standpoint of the fraction of video frames that are not restricted due to the declared traffic parameters. As a result, it becomes clear that the peak rate should be twice the average bitrate. An algorithm is introduced to select the transfer mode, variable bitrate or constant bitrate, for video codec terminals given the type of video sequence and the level of quality required The algorithm also describes the suitable values of the average bitrate.

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[in Japanese]

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