In this paper, we designed and fabricated a new Integrated Spatial Filtering Detector with Variable Multi-valued Weighting Function (ISFD-VMWF). This chip based on 32x32 array of n-well/p-sub photodiodes has been successfully developed using the analog/digital mixed implementation. The weighted-sum structure is proposed to realize the ISFD-VMWF. As the
weighted structure, the 7-bit signed analog weighting circuit is used with cascode current mirrors. The weighting control partis consisted of digital registers in a weighted pixel element as the
sum structure. The weights are controlled and programmed by external interface on the PC. Achieving the sum structure, the weighted current from each processing cell element is summed into one current signal, and two output signals, plus and minus, are outputted. These signals are converted to the voltage signal and amplified by the external differential op-amp with various gains with parallel. The experimental results show that output signals summed up are linearly shifted with changing weights as the basic characteristics of the ISFD-VMWF. To evaluate the ISFD-VMWF, another experiment of the velocity measurement was executed, which shows the effectiveness of the ISFD-VMWF on the measurement system.
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