IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Online ISSN : 1745-1337
Print ISSN : 0916-8508
Volume E94.A , Issue 4
Showing 1-17 articles out of 17 articles from the selected issue
Regular Section
  • Huan-Chan TING, Jeang-Lin CHANG, Yon-Ping CHEN
    Type: PAPER
    Subject area: Systems and Control
    2011 Volume E94.A Issue 4 Pages 1051-1058
    Published: April 01, 2011
    Released: April 01, 2011
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    For time-delay systems with mismatched disturbances and uncertainties, this paper developed an integral sliding mode control algorithm using output information only to stabilize the system. An integral sliding surface is comprised of output vectors and an auxiliary full-order compensator. The proposed output feedback sliding mode controller can satisfy the reaching and sliding condition and maintain the system on the sliding surface from the initial moment. When the specific linear matrix inequality has a solution, our method can guarantee the stability of the closed-loop system and satisfy the property of disturbance attenuation. Moreover, the design parameters of the controller and compensator can be simultaneously determined by the solution to the linear matrix inequality. Finally, a numerical example illustrated the applicability of the proposed scheme.
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  • Kazuo HORIUCHI
    Type: PAPER
    Subject area: Circuit Theory
    2011 Volume E94.A Issue 4 Pages 1059-1066
    Published: April 01, 2011
    Released: April 01, 2011
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    On uniformly convex real Banach spaces, a fixed point theorem in weak topology for successively recurrent system of fuzzy-set-valued nonlinear mapping equations and its application to ring nonlinear network systems are theoretically discussed in detail. An arbitrarily-level likelihood signal estimation is then established.
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  • Keisuke INOUE, Mineo KANEKO, Tsuyoshi IWAGAKI
    Type: PAPER
    Subject area: VLSI Design Technology and CAD
    2011 Volume E94.A Issue 4 Pages 1067-1081
    Published: April 01, 2011
    Released: April 01, 2011
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    For recent and future nanometer-technology VLSIs, static and dynamic delay variations become a serious problem. In many cases, the hold timing constraint, as well as the setup timing constraint, becomes critical for latching a correct signal under delay variations. While the timing violation due to the fail of the setup timing constraint can be fixed by tuning a clock frequency or using a delayed latch, the timing violation due to the fail of the hold timing constraint cannot be fixed by those methods in general. Our approach to delay variations (in particular, the hold timing constraint) proposed in this paper is a novel register assignment strategy in high-level synthesis, which guarantees safe clocking by Backward-Data-Direction (BDD) clocking. One of the drawbacks of the proposed register assignment is the increase in the number of required registers. After the formulation of this new register minimization problem, we prove NP-hardness of the problem, and then derive an integer linear programming formulation for the problem. The proposed method receives a scheduled data flow graph, and generates a datapath having (1) robustness against delay variations, which is ensured by BDD-based register assignment, and (2) the minimum possible number of registers. Experimental results show the effectiveness of the proposed method for some benchmark circuits.
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  • Mikiko SODE TANAKA, Nozomu TOGAWA, Masao YANAGISAWA, Satoshi GOTO
    Type: PAPER
    Subject area: VLSI Design Technology and CAD
    2011 Volume E94.A Issue 4 Pages 1082-1090
    Published: April 01, 2011
    Released: April 01, 2011
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    With the process technological progress in recent years, low voltage power supplies have become quite predominant. With this, the voltage margin has decreased and therefore the power/ground design that satisfies the voltage drop constraint becomes more important. In addition, the reduction of the power/ground total wiring area and the number of layers will reduce manufacturing and designing costs. So, we propose an algorithm that satisfies the voltage drop constraint and at the same time, minimizes the power/ground total wiring area. The proposed algorithm uses the idea of a network algorithm [1] where the edge which has the most influence on voltage drop is found. Voltage drop is improved by changing the resistance of the edge. The proposed algorithm is efficient and effectively updates the edge with the greatest influence on the voltage drop. From experimental results, compared with the conventional algorithm, we confirmed that the total wiring area of the power/ground was reducible by about 1/3. Also, the experimental data shows that the proposed algorithm satisfies the voltage drop constraint in the data whereas the conventional algorithm cannot.
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  • Mototsugu NISHIOKA, Naohisa KOMATSU
    Type: PAPER
    Subject area: Cryptography and Information Security
    2011 Volume E94.A Issue 4 Pages 1091-1105
    Published: April 01, 2011
    Released: April 01, 2011
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    In this paper, we present a new methodology, called a random oracle (RO) transformation, for designing IND-CCA secure PKE schemes in the standard model from schemes in the RO model. Unlike the RO methodology [3],[19], the security of the original scheme in the RO model does not necessarily have to be identical with that of the scheme resulting from the RO transformation. We then introduce a new notion, IND-INS-CCA security, and show how to obtain IND-CCA secure PKE schemes by instantiating ROs in IND-INS-CCA secure PKE schemes. Furthermore, we introduce another new notion, a strong pseudorandom function (PRF) family associated with a trapdoor one-way permutation generator G (briefly, G-SPRF family), which can be regarded as an enhanced PRF family, so that the resulting PKE scheme becomes quite practical.
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  • Kenta KASAI, Charly POULLIAT, David DECLERCQ, Kohichi SAKANIWA
    Type: PAPER
    Subject area: Coding Theory
    2011 Volume E94.A Issue 4 Pages 1106-1115
    Published: April 01, 2011
    Released: April 01, 2011
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    In this paper, we study the average symbol and bit-weight distributions for ensembles of non-binary low-density parity-check codes defined on GF(2p). Moreover, we derive the asymptotic exponential growth rate of the weight distributions in the limit of large codelength. Interestingly, we show that the normalized typical minimum distance does not monotonically increase with the size of the field.
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  • Takakazu SAKAI, Koji SHIBATA
    Type: PAPER
    Subject area: Coding Theory
    2011 Volume E94.A Issue 4 Pages 1116-1123
    Published: April 01, 2011
    Released: April 01, 2011
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    This paper shows a fast estimation method of very low error rate of low-density parity-check (LDPC) codes. No analytical tool is available to evaluate performance of LDPC codes, and the traditional Monte Carlo simulation methods can not estimate the low error rate of LDPC codes due to the limitation of time. To conquer this problem, we propose another simulation method which is based on the optimal simulation probability density function (PDF). The proposed simulation PDF can also avoid the dependency between the simulation time and the number of dominant trapping sets, which is the problem of some fast simulation methods based on the error event simulation method. Additionally, we show some numerical examples to demonstrate the effectiveness of the proposed method. The simulation time of the proposed method is reduced to almost less than 1/10 of that of Cole et al.'s method under the condition of the same accuracy of the estimator.
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  • Wensheng ZHANG, Yukitoshi SANADA
    Type: PAPER
    Subject area: Communication Theory and Signals
    2011 Volume E94.A Issue 4 Pages 1124-1132
    Published: April 01, 2011
    Released: April 01, 2011
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    This paper discusses a dual-stage detection scheme composed of coarse detection stage and refined detection stage for the continuous detection operation of Ultra-Wideband (UWB) detect and avoid (DAA). The threshold factor for the probability of indefinite detection is first proposed and defined to combine the two stages. The proposed scheme focuses on the integration of two different detection schemes with different complexities in order to reduce total computational complexity. A Single-carrier Frequency Division Multiple Access (SC-FDMA) uplink system operating in a Time Division Duplex (TDD) mode is utilized to evaluate the proposed detection scheme. Simulation results indicate that the proposed scheme can make a tradeoff between the detection performance and the computational complexity by setting the probability of indefinite detection.
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  • Shin'ichi KOIKE
    Type: LETTER
    Subject area: Digital Signal Processing
    2011 Volume E94.A Issue 4 Pages 1133-1135
    Published: April 01, 2011
    Released: April 01, 2011
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    In this letter, we derive a probability density function (PDF) for a modulus of product of two complex-valued Gaussian random variables. The PDF is expressed using Modified Bessel Functions, and the probability distribution is named Gaussian Product Modulus Distribution. Some examples of expectation calculation are provided.
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  • Ji-Hye SHIN, Young-Beom JANG
    Type: LETTER
    Subject area: Digital Signal Processing
    2011 Volume E94.A Issue 4 Pages 1136-1139
    Published: April 01, 2011
    Released: April 01, 2011
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    In this paper, a new DA (Distributed Arithmetic) filter implementation technique is presented. Contrary to the conventional DA technique using ROM, the proposed implementation technique avoids the use of ROM since it does not need the combinations of filter coefficients. Furthermore, by using the Radix-16 modified Booth algorithm, implementation complexity of the proposed structure can be reduced. Through the HDL coding and synthesis, it was shown that 41.6% of implementation area can be reduced.
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  • Jinsung OH, Younam KIM
    Type: LETTER
    Subject area: Digital Signal Processing
    2011 Volume E94.A Issue 4 Pages 1140-1143
    Published: April 01, 2011
    Released: April 01, 2011
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    In this paper, we present a new frequency identification technique using the recent methodology of compressive sensing and discrete prolate spheroidal sequences with optimal energy concentration. Using the bandpass form of discrete prolate spheroidal sequences as basis matrix in compressive sensing, compressive frequency sensing algorithm is presented. Simulation results are given to present the effectiveness of the proposed technique for application to detection of carrier-frequency type signal and recognition of wideband signal in communication.
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  • Takao JINNO, Yusuke SAITO, Masahiro OKUDA
    Type: LETTER
    Subject area: Digital Signal Processing
    2011 Volume E94.A Issue 4 Pages 1144-1147
    Published: April 01, 2011
    Released: April 01, 2011
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    In this paper, we present a numerical method for the equiripple approximation of IIR digital filters. The conventional rational Remez algorithm quickly finds the squared magnitude response of the optimal IIR digital filters, and then by factorizing it the equiripple filter is obtained. Unlike the original Remez algorithm for FIR filters, it is difficult for the rational Remez algorithm to explicitly control the ratio of ripples between different bands. In the conventional lowpass filter design, for example, when different weights are given for its passband and stopband, one needs to iteratively design the filter by manually changing the weights in order to achieve the ratio of the weights exactly. To address this problem, we modify the conventional algorithm and make it possible to directly control the ripple ratio. The method iteratively solves eigenvalue problems with controlling the ripple ratio. Using this method, the equiripple solutions with desired weights are obtained automatically.
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  • Younseok CHOO, Young-Ju KIM
    Type: LETTER
    Subject area: Systems and Control
    2011 Volume E94.A Issue 4 Pages 1148-1150
    Published: April 01, 2011
    Released: April 01, 2011
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    In this letter a simplified Jury's table for real polynomials is extended to complex polynomials. Then it is shown that the extended table contains information on the root distribution of complex polynomials with respect to the unit circle in the complex plane. The result given in this letter is distinct from the recent one in that root counting is performed in a different way.
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  • Juinn-Dar HUANG, Chia-I CHEN, Yen-Ting LIN, Wan-Ling HSU
    Type: LETTER
    Subject area: VLSI Design Technology and CAD
    2011 Volume E94.A Issue 4 Pages 1151-1155
    Published: April 01, 2011
    Released: April 01, 2011
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    In deep-submicron era, wire delay is becoming a bottleneck while pursuing even higher system clock speed. Several distributed register (DR) architectures have been proposed to cope with this problem by keeping most wires local. In this article, we propose a new resource-constrained communication synthesis algorithm for optimizing both inter-island connections (IICs) and latency targeting on distributed register-file microarchitecture (DRFM). The experimental results show that up to 24.7% and 12.7% reduction on IIC and latency can be achieved respectively as compared to the previous work.
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  • Abdel Alim KAMAL, Amr YOUSSEF
    Type: LETTER
    Subject area: Cryptography and Information Security
    2011 Volume E94.A Issue 4 Pages 1156-1158
    Published: April 01, 2011
    Released: April 01, 2011
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    In this paper, we present a fault analysis of the original NTRU public key cryptosystem. The fault model in which we analyze the cipher is the one in which the attacker is assumed to be able to fault a small number of coefficients of the polynomial input to (or output from) the second step of the decryption process but cannot control the exact location of injected faults. For this specific original instantiation of the NTRU encryption system with parameters (N,p,q), our attack succeeds with probability ≈ 1 - 1/p and when the number of faulted coefficients is upper bounded by t, it requires O((pN)t) polynomial inversions in Z/pZ[x]/(xN - 1).
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  • Yubo LI, Chengqian XU, Kai LIU
    Type: LETTER
    Subject area: Information Theory
    2011 Volume E94.A Issue 4 Pages 1159-1164
    Published: April 01, 2011
    Released: April 01, 2011
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    In this paper, two constructions of mutually orthogonal zero correlation zone polyphase sequence sets are presented. The first one is based on DFT matrices and interleaving iteration. After each recursive step, the period of sequence and the length of zero-correlation zone are two times larger than that in the last step. The second method, based on DFT matrices and orthogonal matrices, can generate numbers of mutually orthogonal optimal ZCZ sequence sets whose parameters reach the theoretical bounds by using interleaving and shifting techniques. As a result, the algorithms proposed can provide more sequences for the QS-CDMA (quasi-synchronous CDMA) systems.
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  • Liang LI, Akira ASANO, Chie MURAKI ASANO, Mitsuji MUNEYASU, Yoshiko HA ...
    Type: LETTER
    Subject area: Image
    2011 Volume E94.A Issue 4 Pages 1165-1169
    Published: April 01, 2011
    Released: April 01, 2011
    JOURNALS RESTRICTED ACCESS
    A method of estimating dual primitives in a textural image is proposed. This method is based on the Primitive, Grain, and Point Configuration (PGPC) texture model, which regards a texture as an arrangement of grains derived from one or a few primitives. Appropriate primitives can be represented by morphological structuring elements estimated from a texture. Conventional primitive estimation methods estimate only one primitive from each textural image. However, they do not work well on textural images that contain more than one basic structure, since two or more types of grain cannot be generated from only one primitive. The proposed method simultaneously estimates two optimal structuring elements of a texture. The experimental results show that the proposed method provides more representative estimations than the conventional method.
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