In this study, spatially coupled low-density parity-check (SC-LDPC) codes on the two-dimensional array erasure (2DAE) channel are devised, including a method for generating new SC-LDPC codes with a restriction on the check node constraint. A density evolution analysis confirms the improvement in the threshold of the proposed two-dimensional SC-LDPC code ensembles over the one-dimensional SC-LDPC code ensembles. We show that the BP threshold of the proposed codes can approach the corresponding maximum a posteriori (MAP) threshold of the original residual graph on the 2DAE channel. Moreover, we show that the rates of the residual graph of the two-dimensional LDPC block code ensemble are smaller than those of the one-dimensional LDPC block code ensemble. In other words, a high performance can be obtained by choosing the two-dimensional SC-LDPC codes.

Several types of capacitive crosstalk avoidance codes have been devised in order to prevent capacitive crosstalk in on-chip buses. These codes are designed to prohibit transition patterns prone to capacitive crosstalk from any two consecutive words transmitted to on-chip buses. The present paper provides a rigorous analysis of the asymptotic rate for (p,q)-transition free word sequences under the assumption that coding is based on a stateful encoder and a stateless decoder. Here, p and q represent k-bit transition patterns that should not appear in any two consecutive words at the same adjacent k-bit positions. The maximum rate for the sequences is proven to be equal to the subgraph domatic number of the (p,q)-transition free graph. Based on the theoretical results for the subgraph domatic partition problem, lower and upper bounds on the asymptotic rate are derived. We also show that the asymptotic rate 0.8325 is achievable for p=01 and q=10 transition free word sequences.

Performance of network coded cooperation over the Gaussian channel in which multiple communication nodes send each one's message to a common destination is analyzed. The nodes first broadcast the message, and subsequently relay the XOR of subset of decoded messages to the destination. The received vector at the destination can be equivalently regarded as the output of a point-to-point channel, except that the underlying codes are drawn probabilistically and symbol errors may occur before transmission of a codeword. We analyze the error performance of this system from coding theoretic viewpoint.

The network load is increasing due to the spread of content distribution services. Caching is known as a technique to reduce a peak network load by prefetching popular contents into memories of users. Coded caching is a new caching approach based on a carefully designed content placement in order to create coded multicasting opportunities. Recent works have discussed single-layer caching systems, but many networks consist of multiple layers of cache. In this paper, we discuss a coded caching problem for a hierarchical network that has a different number of layers of cache. The network has users who connect to an origin server via a mirror server and users who directly connect to the origin server. We provide lower bounds of the rates for this problem setting based on the cut-set bound. In addition, we propose three basic coded caching schemes and characterize these schemes. Also, we propose a new coded caching scheme by combining two basic schemes and provide achievable rates of the combination coded caching scheme. Finally, we show that the proposed combination scheme demonstrates a good performance by a numerical result.

Locally repairable codes, which can repair erased symbols from other symbols, have attracted a good deal of attention in recent years because its local repair property is effective on distributed storage systems. (r_u, δ_u)_u∈[s]-locally repairable codes with multiple localities, which are an extension of ordinary locally repairable codes, can repair δ_u-1 erased symbols simultaneously from a set consisting of at most r_u symbols. An upper bound on the minimum distance of these codes and a construction method of optimal codes, attaining this bound with equality, were given by Chen, Hao, and Xia. In this paper, we discuss the parameter restrictions of the existing construction, and we propose explicit constructions of optimal codes with multiple localities with relaxed restrictions based on the encoding polynomial introduced by Tamo and Barg. The proposed construction can design a code whose minimum distance is unrealizable by the existing construction.

Racetrack memory (RM) has attracted much attention. In RM, insertion and deletion (ID) errors occur as a result of an unstable reading process and are called position errors. In this paper, we first define a probabilistic channel model of ID errors in RM with multiple read-heads (RHs). Then, we propose a joint iterative decoding algorithm for spatially coupled low-density parity-check (SC-LDPC) codes over such a channel. We investigate the asymptotic behaviors of SC-LDPC codes under the proposed decoding algorithm using density evolution (DE). With DE, we reveal the relationship between the number of RHs and achievable information rates, along with the iterative decoding thresholds. The results show that increasing the number of RHs provides higher decoding performances, although the proposed decoding algorithm requires each codeword bit to be read only once regardless of the number of RHs. Moreover, we show the performance improvement produced by adjusting the order of the SC-LDPC codeword bits in RM.

In this paper, we deal with coding for synchronous errors. We introduce a synchronously erroneous finite state Markov channel model whose SIR is computable. We apply density evolution analysis [1] and the extended version for FSMC [2] to the channel Numerical experiments demonstrated spatially-coupled codes approach the SIR of the channel.

F.P. Preparata et al. have proposed a fault diagnosis model to find all faulty units in the multicomputer system by using outcomes which each unit tests some other units. In this paper, for probabilistic diagnosis models, we show an efficient diagnosis algorithm to obtain a posteriori probability that each of units is faulty given the test outcomes. Furthermore, we propose a method to analyze the diagnostic error probability of this algorithm.

Two kinds of problems - multiterminal hypothesis testing and one-to-many lossy source coding - are investigated in a unified way. It is demonstrated that a simple key idea, which is developed by Iriyama for one-to-one source coding systems, can be applied to multiterminal source coding systems. In particular, general bounds on the error exponents for multiterminal hypothesis testing and one-to-many lossy source coding are given.

This paper considers a joint channel coding and random number generation from the channel output. Specifically, we want to transmit a message to a receiver reliably and at the same time the receiver extracts pure random bits independent of the channel input. We call this problem as the joint channel coding and intrinsic randomness problem. For general channels, we clarify the trade-off between the coding rate and the random bit rate extracted from the channel output by using the achievable rate region, where both the probability of decoding error and the approximation error of random bits asymptotically vanish. We also reveal the achievable rate regions for stationary memoryless channels, additive channels, symmetric channels, and mixed channels.

We normally hold a lot of confidential information in hard disk drives and solid-state drives. When we want to erase such information to prevent the leakage, we have to overwrite the sequence of information with a sequence of symbols independent of the information. The overwriting is needed only at places where overwritten symbols are different from original symbols. Then, the cost of overwrites such as the number of overwritten symbols to erase information is important. In this paper, we clarify the minimum cost such as the minimum number of overwrites to erase information under weak and strong independence criteria. The former (resp. the latter) criterion represents that the mutual information between the original sequence and the overwritten sequence normalized (resp. not normalized) by the length of the sequences is less than a given desired value.

In the successive refinement problem, a fixed-length sequence emitted from an information source is encoded into two codewords by two encoders in order to give two reconstructions of the sequence. One of two reconstructions is obtained by one of two codewords, and the other reconstruction is obtained by all two codewords. For this coding problem, we give non-asymptotic inner and outer bounds on pairs of numbers of codewords of two encoders such that each probability that a distortion exceeds a given distortion level is less than a given probability level. We also give a general formula for the rate-distortion region for general sources, where the rate-distortion region is the set of rate pairs of two encoders such that each maximum value of possible distortions is less than a given distortion level.

In multilevel flash memory, in general, multiple read thresholds are required to read a single logical page. Random I/O (RIO) code, introduced by Sharon and Alrod, is a coding scheme that enables the reading of one logical page using a single read threshold. It was shown that the construction of RIO codes is equivalent to the construction of write-once memory (WOM) codes. Yaakobi and Motwani proposed a family of RIO codes, called parallel RIO (P-RIO) code, in which all logical pages are encoded in parallel. In this paper, we utilize coset coding with Hamming codes in order to construct P-RIO codes. Coset coding is a technique to construct WOM codes using linear binary codes. We leverage information on the data of all pages to encode each page. Our P-RIO codes, using which more pages can be stored than RIO codes constructed via coset coding, have parameters for which RIO codes do not exist.

Recent years have seen increasing efforts to improve the input/output performance of multilevel flash memory. In this regard, we propose a coding scheme for two-page unrestricted-rate parallel random input-output (P-RIO) code, which enables different code rates to be used for each page of multilevel memory. On the second page, the set of cell-state vectors for each message consists of two complementary vectors with length n. There are a total of 2^n-1 sets that are disjoint to guarantee that they are uniquely decodable for 2^n-1 messages. On the first page, the set of cell-state vectors for each message consists of all weight-u vectors with their non-zero elements restricted to the same (2u-1) positions, where the non-negative integer u is less than or equal to half of the code length. Finding cell-state vector sets such that they are disjoint on the first page is equivalent to the construction of constant-weight codes, and the number of disjoint sets is the best-known number of code words in the constant-weight codes. Our coding scheme is constructive, and the code length is arbitrary. The sum rates of our proposed codes are higher than those of previous work.

Compressed Sensing (CS) is known to provide better channel estimation performance than the Least Square (LS) method for channel estimation. However, multipath delays may not be resolved if they span between the grids. This grid problem of CS is an obstacle to super resolution channel estimation. An Atomic Norm (AN) minimization is one of the methods for estimating continuous parameters. The AN minimization can successfully recover a spectrally sparse signal from a few time-domain samples even though the dictionary is continuous. There are studies showing that the AN minimization method has better resolution than conventional CS methods. In this paper, we propose a channel estimation method based on the AN minimization for Spread Spectrum (SS) systems. The accuracy of the proposed channel estimation is compared with the conventional LS method and Dantzig Selector (DS) of the CS. In addition to the application of channel estimation in wireless communication, we also show that the AN minimization can be applied to Global Positioning System (GPS) using Gold sequence.

The number of infected hosts on enterprise networks has been increased by drive-by download attacks. In these attacks, users of compromised popular websites are redirected toward websites that exploit vulnerabilities of a browser and its plugins. To prevent damage, detection of infected hosts on the basis of proxy logs rather than blacklist-based filtering has started to be researched. This is because blacklists have become difficult to create due to the short lifetime of malicious domains and concealment of exploit code. To detect accesses to malicious websites from proxy logs, we propose a system for detecting malicious URL sequences on the basis of three key ideas: focusing on sequences of URLs that include artifacts of malicious redirections, designing new features related to software other than browsers, and generating new training data with data augmentation. To find an effective approach for classifying URL sequences, we compared three approaches: an individual-based approach, a convolutional neural network (CNN), and our new event de-noising CNN (EDCNN). Our EDCNN reduces the negative effects of benign URLs redirected from compromised websites included in malicious URL sequences. Evaluation results show that only our EDCNN with proposed features and data augmentation achieved a practical classification performance: a true positive rate of 99.1%, and a false positive rate of 3.4%.

The learning with errors (LWE) problem is considered as one of the most compelling candidates as the security base for the post-quantum cryptosystems. For the application of LWE based cryptographic schemes, the concrete parameters are necessary: the length n of secret vector, the moduli q and the deviation σ. In the middle of 2016, Germany TU Darmstadt group initiated the LWE Challenge in order to assess the hardness of LWE problems. There are several approaches to solve the LWE problem via reducing LWE to other lattice problems. Xu et al.'s group solved some LWE Challenge instances using Liu-Nguyen's adapted enumeration technique (reducing LWE to BDD problem) [23] and they published this result at ACNS 2017 [32]. In this paper, at first, we applied the progressive BKZ on the LWE challenge cases of σ/q=0.005 using Kannan's embedding technique. We can intuitively observe that the embedding technique is more efficient with the embedding factor M closer to 1. Then we will analyze the optimal number of samples m for a successful attack on LWE case with secret length of n. Thirdly based on this analysis, we show the practical cost estimations using the precise progressive BKZ simulator. Simultaneously, our experimental results show that for n ≥ 55 and the fixed σ/q=0.005, the embedding technique with progressive BKZ is more efficient than Xu et al.'s implementation of the enumeration algorithm in [32][14]. Moreover, by our parameter setting, we succeed in solving the LWE Challenge over (n,σ/q)=(70, 0.005) using 2^16.8 seconds (32.73 single core hours).

The present paper introduces a novel type of structured ternary sequences having a zero-correlation zone (zcz) for both periodic and aperiodic correlation functions. The cross-correlation function and the side lobe of the auto-correlation function of the proposed sequence set are zero for phase shifts within the zcz. The proposed zcz sequence set can be generated from an arbitrary pair of an Hadamard matrix of order l_h and a binary/ternary perfect sequence of length l_p. The sequence set of order 0 is identical to the r-th row of the Hadamard matrix. For m ≥ 0, the sequence set of order (m+1) is constructed from the sequence set of order m by sequence concatenation and interleaving. The sequence set has l_p subsets of size 2l_h. The periodic correlation function and the aperiodic correlation function of the proposed sequence set have a zcz from -(2^m+1-1) to 2^m+1-1. The periodic correlation function and the aperiodic correlation function of the sequences of the i-th subset and k-th subset have a zcz from -2^m+2-(l_h+1)((j-k) mod l_p) to -2^m+2-(l_h+1)((j-k) mod l_p). The proposed sequence is suitable for a heterogeneous wireless network, which is one of the candidates for the fifth-generation mobile networks.

Lasso regression based on the L₁ regularization is one of the most popular sparse estimation methods. It is often required to set appropriately in advance the regularization parameter that determines the degree of regularization. Although the empirical Bayes approach provides an effective method to estimate the regularization parameter, its solution has yet to be fully investigated in the lasso regression model. In this study, we analyze the empirical Bayes estimator of the one-parameter model of lasso regression and show its uniqueness and its properties. Furthermore, we compare this estimator with that of the variational approximation, and its accuracy is evaluated.

Low-density chaotic binary sequences generated by Bernoulli map are discussed in this paper. We theoretically evaluate auto-correlation functions of the low-density chaotic binary sequences based on chaos theory.

Spatially “Mt. Fuji” coupled (SFC) low density parity check (LDPC) codes are constructed as a chain of block LDPC codes. A difference between the SFC-LDPC codes and the original spatially coupled (SC) LDPC codes is code lengths of the underlying block LDPC codes. The code length of the block LDPC code at the middle of the chain is larger than that at the end of the chain. It is experimentally confirmed that the bit error probability in the error floor region of the SFC-LDPC code is lower than that of the SC-LDPC code whose code length and design rate are the same as those of the SFC-LDPC code. In this letter, we calculate the weight distribution of the SFC-LDPC code and try to explain causes of the low bit error rates of the SFC-LDPC code.

In 1973, Arimoto proved the strong converse theorem for the discrete memoryless channels stating that when transmission rate R is above channel capacity C, the error probability of decoding goes to one as the block length n of code word tends to infinity. He proved the theorem by deriving the exponent function of error probability of correct decoding that is positive if and only if R > C. Subsequently, in 1979, Dueck and Körner determined the optimal exponent of correct decoding. Recently the author determined the optimal exponent on the correct probability of decoding have the form similar to that of Dueck and Körner determined. In this paper we give a rigorous proof of the equivalence of the above exponet function of Dueck and Körner to a exponent function which can be regarded as an extention of Arimoto's bound to the case with the cost constraint on the channel input.

Let X, Y be two correlated discrete random variables. We consider an estimation of X from encoded data ϕ(Y) of Y by some encoder function ϕ(Y). We derive an inequality describing a relation of the correct probability of estimation and the mutual information between X and ϕ(Y). This inequality may be useful for the secure analysis of crypto system when we use the success probability of estimating secret data as a security criterion. It also provides an intuitive meaning of the secrecy exponent in the strong secrecy criterion.

Forward Error Correction (FEC) schemes have played an important role in intensity-modulation direct-detection (IM/DD) Visible Light Communication (VLC) systems. While hard-decision FEC schemes are inferior to soft-decision FEC codes in terms of decoding performance, they are widely used in these VLC systems because receivers are only capable of recognizing logical values 0 and 1. In this letter, we propose a method to calculate the log-likelihood ratios (LLR) values which are used as input of soft-decision FEC decoders. Simulation results show that Polar decoder using proposed method performs better than that of using the hard-decision technique.

The construction of frequency hopping sequences with good Hamming correlation is the foundation of research in frequency hopping communication. In this letter, classes of optimal low hit zone frequency hopping sequence set are constructed based on the interleaving technology. The results of the study show that the sequence set with large family size is optimal for the Peng-Fan-Lee bound. And all the sequences in the set are inequivalent.

In this letter, a generic method to construct mutually orthogonal binary zero correlation zone (ZCZ) sequence sets from mutually orthogonal complementary sequence sets (MOCSSs) with certain properties is presented at first. Then MOCSSs satisfying conditions are generated from binary orthogonal matrices with order N×N, where N=p-1, p is a prime. As a result, mutually orthogonal binary ZCZ sequence sets with parameters (2N²,N,N+1)-ZCZ can be obtained, the number of ZCZ sets is N. Note that each single ZCZ sequence set is optimal with respect to the theoretical bound.

This paper describes a design methodology for process variation aware D-Flip-Flop (DFF) using regression analysis. We propose to use a regression analysis to model the worst-case delay characteristics of a DFF under process variation. We utilize the regression equation for transistor width tuning of the DFF to improve its worst-case delay performance. Regression analysis can not only identify the performance-critical transistors inside the DFF, but also shows these impacts on DFF delay performance in quantitative form. Proposed design methodology is verified using Monte-Carlo simulation. The result shows the proposed method achieves to design a DFF which has similar or better delay characteristics in comparison with the DFF designed by an experienced cell designer.

In this paper, we propose a design of reversible adder/subtractor blocks and arithmetic logic units (ALUs). The main concept of our approach is different from that of the existing related studies; we emphasize the function design. Our approach of investigating the reversible functions includes (a) the embedding of irreversible functions into incompletely-specified reversible functions, (b) the operation assignment, and (c) the permutation of function outputs. We give some extensions of these techniques for further improvements in the design of reversible functions. The resulting reversible circuits are smaller than that of the existing design in terms of the number of multiple-control Toffoli gates. To evaluate the quantum cost of the obtained circuits, we convert the circuits to reduced quantum circuits for experiments. The results also show the superiority of our realization of adder/subtractor blocks and ALUs in quantum cost.

Multiplication is a key fundamental function for many error-tolerant applications. Approximate multiplication is considered to be an efficient technique for trading off energy against performance and accuracy. This paper proposes an accuracy-controllable multiplier whose final product is generated by a carry-maskable adder. The proposed scheme can dynamically select the length of the carry propagation to satisfy the accuracy requirements flexibly. The partial product tree of the multiplier is approximated by the proposed tree compressor. An 8×8 multiplier design is implemented by employing the carry-maskable adder and the compressor. Compared with a conventional Wallace tree multiplier, the proposed multiplier reduced power consumption by between 47.3% and 56.2% and critical path delay by between 29.9% and 60.5%, depending on the required accuracy. Its silicon area was also 44.6% smaller. In addition, results from two image processing applications demonstrate that the quality of the processed images can be controlled by the proposed multiplier design.

A phase locking value (PLV) in electrocorticography is an essential indicator for analysis of cognitive activities and detection of severe diseases such as seizure of epilepsy. The PLV computation requires a simultaneous pursuit of high-throughput and low-cost implementation in hardware acceleration. The PLV computation consists of bandpass filtering, Hilbert transform, and mean phase coherence (MPC) calculation. The MPC calculation includes trigonometric functions and divisions, and these calculations require a lot of computational amounts. This paper proposes an MPC calculation method that removes high-cost operations from the original MPC with mathematically identical derivations while the conventional methods sacrifice either computational accuracy or throughput. This paper also proposes a hardware implementation of MPC calculator whose latency is 21 cycles and pipeline interval is five cycles. Compared with the conventional implementation with the same standard cell library, the proposed implementation marks 2.8 times better hardware implementation efficiency that is defined as throughput per gate counts.

As semiconductor device manufacturing technology evolves toward higher integration and reduced feature size, the gap between the defect level estimated at the design stage and that reported for fabricated devices has become wider, making it more difficult to control total manufacturing cost including test cost and cost for field failure. To estimate fault coverage more precisely considering occurrence probabilities of faults, we have proposed weighted fault coverage estimation based on critical area corresponding to each fault. Previously different fault models were handled separately; thus, pattern compression efficiency and runtime were not optimized. In this study, we propose a fast test pattern generation scheme that considers weighted bridge and open fault coverage in an integrated manner. The proposed scheme applies two-step test pattern generation, wherein test patterns generated at second step that target only bridge faults are reordered with a search window of fixed size, achieving O(n) computational complexity. Experimental results indicate that with 10% of the initial target fault size and a fixed, small window size, the proposed scheme achieves approximately 100 times runtime reduction when compared to simple greedy-based reordering, in exchange for about 5% pattern count increment.

As LSI chips integrate more transistors and the operating power supply voltage decreases, LSI chips are becoming more vulnerable to the soft error caused by neutrons induced from cosmic rays. The soft error is detected by comparing the duplicated operation results in double modular redundancy (DMR) and the error is corrected by re-executing necessary operations. In this paper, based on the error recovery scheme of re-executing necessary operations, the minimization of the vote operations for error checking with respect to given resource constraints is considered. An ILP model for the optimal solution to the problem is presented and a heuristic algorithm is proposed to minimize the vote operations.

The super-resolution technology is one of the solutions to fill the gap between high-resolution displays and lower-resolution images. There are various algorithms to interpolate the lost information, one of which is using a convolutional neural network (CNN). This paper shows an FPGA implementation and a performance evaluation of a novel CNN-based super-resolution system, which can process moving images in real time. We apply horizontal and vertical flips to input images instead of enlargement. This flip method prevents information loss and enables the network to make the best use of its patch size. In addition, we adopted the residue number system (RNS) in the network to reduce FPGA resource utilization. Efficient multiplication and addition with LUTs increased a network scale that can be implemented on the same FPGA by approximately 54% compared to an implementation with fixed-point operations. The proposed system can perform super-resolution from 960×540 to 1920×1080 at 60fps with a latency of less than 1ms. Despite resource restriction of the FPGA, the system can generate clear super-resolution images with smooth edges. The evaluation results also revealed the superior quality in terms of the peak signal-to-noise ratio (PSNR) and the structural similarity (SSIM) index, compared to systems with other methods.

A 256-bit $\mathbb{F}_p$ ECDSA crypto processor featuring low latency, low energy consumption and capability of changing the Elliptic curve parameters is designed and fabricated in SOTB 65nm CMOS process. We have demonstrated the lowest ever reported signature generation time of 31.3 μs at 238MHz clock frequency. Energy consumption is 3.28 μJ/signature-generation, which is same as the lowest reported till date. We have also derived addition formulae on Elliptic curve useful for reduce the number of registers and operation cycles.

On-line object tracking (OLOT) has been a core technology in computer vision, and its importance has been increasing rapidly. Because this technology is utilized for battery-operated products, energy consumption must be minimized. This paper describes a method of adaptive frame-rate optimization to satisfy that requirement. An energy trade-off occurs between image capturing and object tracking. Therefore, the method optimizes the frame-rate based on always changed object speed for minimizing the total energy while taking into account the trade-off. Simulation results show a maximum energy reduction of 50.0%, and an average reduction of 35.9% without serious tracking accuracy degradation.

Modern digital integrated circuits (ICs) are often designed and fabricated by third parties and tools, which can make IC design/fabrication vulnerable to malicious modifications. The malicious circuits are generally referred to as hardware Trojans (HTs) and they are considered to be a serious security concern. In this paper, we propose a logic-testing based HT detection and classification method utilizing steady state learning. We first observe that HTs are hidden while applying random test patterns in a short time but most of them can be activated in a very long-term random circuit operation. Hence it is very natural that we learn steady signal-transition states of every suspicious Trojan net in a netlist by performing short-term random simulation. After that, we simulate or emulate the netlist in a very long time by giving random test patterns and obtain a set of signal-transition states. By discovering correlation between them, our method detects HTs and finds out its behavior. HTs sometimes do not affect primary outputs but just leak information over side channels. Our method can be successfully applied to those types of HTs. Experimental results demonstrate that our method can successfully identify all the real Trojan nets to be Trojan nets and all the normal nets to be normal nets, while other existing logic-testing HT detection methods cannot detect some of them. Moreover, our method can successfully detect HTs even if they are not really activated during long-term random simulation. Our method also correctly guesses the HT behavior utilizing signal transition learning.

Recently, it has been reported that malicious third-party IC vendors often insert hardware Trojans into their products. Especially in IC design step, malicious third-party vendors can easily insert hardware Trojans in their products and thus we have to detect them efficiently. In this paper, we propose a machine-learning-based hardware-Trojan detection method for gate-level netlists using multi-layer neural networks. First, we extract 11 Trojan-net feature values for each net in a netlist. After that, we classify the nets in an unknown netlist into a set of Trojan nets and that of normal nets using multi-layer neural networks. By experimentally optimizing the structure of multi-layer neural networks, we can obtain an average of 84.8% true positive rate and an average of 70.1% true negative rate while we can obtain 100% true positive rate in some of the benchmarks, which outperforms the existing methods in most of the cases.

Impedance mismatching is a major obstacle hindering the application of DC power line communication (DC-PLC) due to the unpredictability of access impedance and random loads. Researchers and manufacturers typically estimate the power line impedance level and use a fixed single-winding coupler to carry out signal coupling, which does not achieve accurate impedance matching and leads to large signal attenuation and low reliability. In this paper, a lumped parameter power line communication model for DC-PLC is established in which the optimal receiver winding ratio is derived from equivalent circuits. A modifiable impedance matching coupler was designed to achieve dynamic impedance matching, and a series of simulations were run to analyze the relationship among optimal winding ratio, power line impedance and series loads. The performance of different winding ratio couplers under varied frequency and load impedance was also measured in a laboratory environment to find that adopting the modifiable impedance matching coupler is indeed a useful strategy for achieving adaptive impedance matching with maximum signal power transfer.

As an optimal combinatorial object, cyclic perfect Mendelsohn difference family (CPMDF) was introduced by Fuji-Hara and Miao to construct optimal optical orthogonal codes. In this paper, we propose a direct construction of disjoint CPMDFs from the Zeng-Cai-Tang-Yang cyclotomy. Compared with a recent work of Fan, Cai, and Tang, our construction doesn't need to depend on a cyclic difference matrix. Furthermore, strictly optimal frequency-hopping sequences (FHSs) are a kind of optimal FHSs which has optimal Hamming auto-correlation for any correlation window. As an application of our disjoint CPMDFs, we present more flexible combinatorial constructions of strictly optimal FHSs, which interpret the previous construction proposed by Cai, Zhou, Yang, and Tang.

In the past two decades, many generalized cyclotomic sequences have been constructed and they have been used in cryptography and communication systems for their high linear complexity and low autocorrelation. But there are a few of papers focusing on the 2-adic complexities of such sequences. In this paper, we first give a property of a class of Gaussian periods based on Whiteman's generalized cyclotomic classes of order 4. Then, as an application of this property, we study the 2-adic complexity of a class of Whiteman's generalized cyclotomic sequences constructed from two distinct primes p and q. We prove that the 2-adic complexity of this class of sequences of period pq is lower bounded by pq-p-q-1. This lower bound is at least greater than one half of its period and thus it shows that this class of sequences can resist against the rational approximation algorithm (RAA) attack.

Lighting constrained visible-light communications are expected as indoor communications of next generation. In lighting constrained visible-light communications, lighting devices are used not only for illuminating rooms but also for optical wireless communications. For lighting constrained visible-light communications, we have been proposed a variable N-parallel code-shift-keying (VN-CSK) using a modified prime sequence code (MPSC). The VN-CSK system using MPSC has not only a suppression function for reducing co-channel interference from neighboring lighting devices, but also a function for keeping constant data transmission regardless of dimming control. In this paper, the bit error rate (BER) of the VN-CSK system using MPSC is derived under an indoor visible-light communication channel by theoretical analysis. Moreover, we evaluate the BER performance for the brightness level (dimming control stage).

For an odd prime p and a positive integer k ≥ 2, we propose and analyze construction of perfect p^k-ary sequences of period p^k based on cubic polynomials over the integers modulo p^k. The constructed perfect polyphase sequences from cubic polynomials is a subclass of the perfect polyphase sequences from the Mow's unified construction. And then, we give a general approach for constructing optimal families of perfect polyphase sequences with some properties of perfect polyphase sequences and their optimal families. By using this, we construct new optimal families of p^k-ary perfect polyphase sequences of period p^k. The constructed optimal families of perfect polyphase sequences are of size p-1.

Many linear codes with two or three weights have recently been constructed due to their applications in consumer electronics, communication, data storage system, secret sharing, authentication codes, association schemes, and strongly regular graphs. In this paper, two classes of p-ary linear codes with two or three weights are presented. The first class of linear codes with two or three weights is obtained from a certain non-quadratic function. The second class of linear codes with two weights is obtained from the images of a certain function on $\mathbb{F}_{p^m}$. In some cases, the resulted linear codes are optimal in the sense that they meet the Griesmer bound.

In this paper, we investigate how to obtain binary locally repairable codes (LRCs) with good locality and availability from binary Simplex codes. We first propose a Combination code having the generator matrix with all the columns of positive weights less than or equal to a given value. Such a code can be also obtained by puncturing all the columns of weights larger than a given value from a binary Simplex Code. We call by block-puncturing such puncturing method. Furthermore, we suggest a heuristic puncturing method, called subblock-puncturing, that punctures a few more columns of the largest weight from the Combination code. We determine the minimum distance, locality, availability, joint information locality, joint information availability of Combination codes in closed-form. We also demonstrate the optimality of the proposed codes with certain choices of parameters in terms of some well-known bounds.

Pseudorandom number generators are required to generate pseudorandom numbers which have good statistical properties as well as unpredictability in cryptography. An m-sequence is a linear feedback shift register sequence with maximal period over a finite field. M-sequences have good statistical properties, however we must nonlinearize m-sequences for cryptographic purposes. A geometric sequence is a sequence given by applying a nonlinear feedforward function to an m-sequence. Nogami, Tada and Uehara proposed a geometric sequence whose nonlinear feedforward function is given by the Legendre symbol, and showed the period, periodic autocorrelation and linear complexity of the sequence. Furthermore, Nogami et al. proposed a generalization of the sequence, and showed the period and periodic autocorrelation. In this paper, we first investigate linear complexity of the geometric sequences. In the case that the Chan-Games formula which describes linear complexity of geometric sequences does not hold, we show the new formula by considering the sequence of complement numbers, Hasse derivative and cyclotomic classes. Under some conditions, we can ensure that the geometric sequences have a large linear complexity from the results on linear complexity of Sidel'nikov sequences. The geometric sequences have a long period and large linear complexity under some conditions, however they do not have the balance property. In order to construct sequences that have the balance property, we propose interleaved sequences of the geometric sequence and its complement. Furthermore, we show the periodic autocorrelation and linear complexity of the proposed sequences. The proposed sequences have the balance property, and have a large linear complexity if the geometric sequences have a large one.

In this paper, for any given prime power q, using Helleseth-Gong sequences with ideal auto-correlation property, we propose a class of perfect sequences of length (q^m-1)/(q-1). As an application, a subclass of constructed perfect sequences is used to design optimal and perfect difference systems of sets.

Boolean functions used in stream ciphers and block ciphers should have high second-order nonlinearity to resist several known attacks and some potential attacks which may exist but are not yet efficient and might be improved in the future. The second-order nonlinearity of Boolean functions also plays an important role in coding theory, since its maximal value equals the covering radius of the second-order Reed-Muller code. But it is an extremely hard task to calculate and even to bound the second-order nonlinearity of Boolean functions. In this paper, we present a lower bound on the second-order nonlinearity of the generalized Maiorana-McFarland Boolean functions. As applications of our bound, we provide more simpler and direct proofs for two known lower bounds on the second-order nonlinearity of functions in the class of Maiorana-McFarland bent functions. We also derive a lower bound on the second-order nonlinearity of the functions which were conjectured bent by Canteaut and whose bentness was proved by Leander, by further employing our bound.