Recently, a signal processing using positive and negative edges of clock is used by memory and various digital devices to improve performance of digital circuits. In a signal processing using double edges, 50% duty cycle of an output signal of clock generator is an important factor. In this paper, we propose the programmable divider which always we obtain the output signal of 50% duty cycle unrelated to the dividing ratio. The circuit configuration of this divider is very simple, and the operation is stable regardless of the increase in the division ratio. Also, when the proposed divider was included in the dividing ratio changeable-digital phase locked loop (DC-PLL), the output signal is always kept to 50% duty cycle regardless of the frequency of input signal. In experimental results using an FPGA, we confirmed that this DC-PLL has the expected characteristics for phase error, lock-in range, and initial pull-in.
Reference voltages of a stochastic flash A-to-D converter (SFADC) are defined by comparator offset voltages instead of fixed external reference voltages. Assuming that offset-voltage variation follows Gaussian distribution, its cumulative distribution function becomes non-linear and the linear input signal range is narrow. We propose a way to reduce nonlinearity by dividing the comparators into M groups, and synthesize a single uniform distribution by introducing additional DC reference voltages and weights for each group. This work presents a design guide to determine how many groups we should divide to obtain good linearity.
A number of recent studies on neural networks have been conducted with the purpose of applying engineering to the brain function. One approach which focuses on the dynamics of the living organism, various Artificial Neural Networks (ANNs) has been proposed. However, the neural network of a living body is very large in scale. Therefore, when we analyze the dynamics using the hardware neural network model, the number of devices and the circuit size should be smaller. In this paper, we aim to reduce the area of a cell body model, and look into the cell body model made up of only NMOS. As a result, it is clearly shown that the packaging density of the proposed model can reduce the size of a traditional model by more than half.
A glitch-free time-to-digital converter (TDC) based on Gray code is presented. This architecture can reduce hardware, power consumption, as well as chip area significantly compared to a flash type TDC, while keeping comparable performance and glitch-free characteristics. Its proof-of-concept prototype was implemented on FPGA, and the simulation and measurement results validate the effectiveness of the proposed architecture.
Class D amplifier, which uses differential output signal between PWM pulses compensated difference of delay, which are obtained from input signal and from inversed input signal, is proposed. Proposed class D amplifier is shown to reduce amplitude of the differential output pulse to half. After the difference of delay was compensated, odd number harmonics noise from the differential output pulse was able to be reduced by more than 41 dB. Furthermore, harmonic distortion in the output signal was able to be reduced by more than 16 dB, and also its THD was reduced to 0.38 times and became to less than half of conventional circuit. The proposed circuit can be configured only by applying small modification to small-signal stage in integrated circuit. In addition to the reduction of EMI, there is an advantage in use of miniaturized components for LPF, because the output pulse frequency is able to be increased double of conventional in same sampling rate.
Recently, high-speed searching for the most similar reference data out of the database is needed for data compression, image recognition, network control, and others. However, it takes much time to search for data with software, or hardware using conventional memory. Associative memory has been developed as a high-speed searching device. In this paper, we propose a minimum Hamming distance search associative memory using neuron CMOS inverters. The proposed associative memory is less affected by initial charge and a change of threshold voltage of neuron MOS transistors than conventional neuron CMOS circuits. The proposed circuit also makes searching speed higher by using fully parallel processing. We confirmed that the proposed circuit can be realized expected results by simulation, and experiment using test chip.
In this paper, EMI reduction method for switching power supply circuit by using PLL circuit as reference signal whose spectrum is spreaded, is proposed. M-sequence pseudo random signal is employed for PLL spectrum spread. Next, we extend this low bit M-sequence pseudo random signal to spectrum spread signal called “pseudo analog signal. ” The proposed pseudo analog signal can realize that the effect of the spectrum spread is wide even if the number of bit of the pseudo random circuit is small. Simulations and measurement are performed to verify the validity of the proposed method. Simulation and measurement results indicate that the proposed method have a large effect of the spectrum spread.
A wearable fetal heart rate measuring device is desired for the early detection of the abnormal development of a fetus. A low noise amplifier which occupies small chip area is indispensable for implementation of the wearable measurement device because a multi-point measurement is necessary for accurate measurement using an independent component analysis. In this paper we propose a novel multi-channel amplifier for biomedical applications. A reference input terminal of the proposed amplifier is shared by plural sub-amplifiers to reduce the power consumption. Hspice simulations show that the power consumption of the proposed circuit with 4 inputs is 39% lower than that of a conventional amplifier. It is shown that an independent component analysis based on Fast ICA can extract a fetal electrocardiogram from the output voltages of the proposed amplifier.
This paper proposes the design scheme of direct sampling mixer (DSM) by which unallowable amplitude characteristics due to aliases spreading over relatively broad band is suppressed. It is pointed out that the periodic frequency characteristic of a stage processing decimated signal causes decrease of attenuation in the stopband of the DSM, and an IIR section with a low decimation rate is employed as the first stage. A DSM the amplitude characteristic of which falls into the spectrum mask for IEEE 802.11 is designed as an example. Simulation results show that the designed DSM satisfies specification widely in not only the passband but also the stopband. It is confirmed that gradual decimation approach or use of a non-decimated section for the first stage is effective.
This paper describes a low distortion sine wave oscillator. It is known that there are the distortion that comes from gain control circuit and characteristic of the devices in the state variable oscillator. To decrease the distortion, the automatic gain control circuit (AGC circuit) using square add method that is composed of analog multiplier is proposed and examined. Square add method can be applied to 2phase oscillator and 3phase oscillator. The output signal of AGC circuit using square add method has distortion that comes from the error between 2phase or 3phase alternating current. And 3phase AGC circuit has lower distortion than 2phase AGC circuit. The THD of 3phase oscillator using the AGC circuit is -135.2dB that is signal of low distortion.
Our present work develops an all fiber coherent beam combining system to achieve a high energy pulse fiber laser beyond pulse energy limits due to nonlinear effects in rare-earth-doped fibers. Coherent beam combining is a power addition technology that obtains high energy density and high beam quality because it integrates multiple laser beams in a mono-light wave. However, the coherent beam combining using optical fibers is technically difficult because the optical phases and polarizations in optical fibers fluctuate due to disturbances. Therefore, we developed a novel all fiber coherent beam combining system that can precisely control optical path lengths and automatically compensate polarization changes. When the system combined four laser pulses, it achieved a beam-combining efficiency of 96.6% that was about four times as high as a pulse energy before combining. In addition, the system obtained 97.1% beam-combining efficiency of coherent beam combining using femtosecond pulses that have very low coherences by minimizing the optical path-length differences between combined two pulses. Moreover, the system successfully regulated the beam-combining-efficiency changes to less than 2.0 percentage points in full width by suppressing optical path-length fluctuations and tracking-control of the optical phases.
In present psychiatric diagnosis, an interview by the psychiatrist is mainly adopted, which highly depends on knowledge and experience of the psychiatrist. Therefore, objective and quantitative psychiatric diagnosis is required. In this paper, non-invasive eye movement measurement apparatus for psychiatric diagnosis is investigated. The apparatus has an eye movement measurement function using image processing and target motion control function on monitor as a stimulus. Moreover, number of saccade occurrences is extracted from the measurement data of image processing by using the eye movement measurement system. The proposed system is applied both to healthy subjects and schizophrenic patients, and the results show the effectiveness of the proposed system.
In this study we measured the prefrontal blood volume of 77 subjects using near-infrared spectroscopy while performing a stroop task - a task of selective attention and inhibition - to determine if it can be used as one more tool in the screening of dementia. We examined 43 patients with dementia (age 82.7±6.6, 7 male, 36 female, Mini Mental State: 1-23), 15 health elderly controls (age 80.7±4.7, 2 male, 13 female, Mini Mental State: 24-30) , and 19 health young people (age 21.5±0.7, 12 males, 7 females). The results showed that patients with dementia achieved a stroop task average score of 2.9±2.9 while the health elderly controls achieved scores of 8.4±6.0, and health young subjects achieved scores of 30.2±6.3. Health elderly controls and health young people showed increases in prefrontal blood volume during stroop task, while patients with dementia showed no significant increases.
We propose a method that uses speech analysis to measure speaker fatigue to develop general-purpose fatigue measurement system. Our proposed method uses the following fatigue measurement indexes: fundamental frequency(F0), average speech power, and speech period. We call these ‘speech fatigue measurement indexes'. To show the effectiveness of our proposed method, performed three experiments where subjects rode on a bicycle simulator. From our experiment results, we obtained significant results of a CVa-a variation coefficient (acceleration plethysmogram) and our proposed speech fatigue measurement indexes. However, since we failed to obtain significant results by another conventional method, we conclude that our proposed method effectively measures speaker fatigue better than a conventional method.
This paper presents a threshold setting method for DFS (Dynamic Frequency Scaling) aiming at energy saving of network interface cards. The method dynamically changes the clock frequency of the circuit according to the queue length of transmission buffer. Our method provides lower packet loss probability than the existing one.