In this paper, a synthesis of a complex RiCR filter is proposed. The proposed prototype filter includes terminating resistors, floating capacitors and grounded imaginary resistors only. Because the proposed RiCR filter includes no floating imaginary resistors, we can reduce the active elements when we realize the filter using OTA's and capacitors. The proposed prototype filter is obtained through a frequency transformation and an equivalent transformation using imaginary gyrators. Using imaginary gyrators composed of imaginary resistors, we can transform all the inductors into capacitors. The condition for reducing the floating type imaginary resistors is described. The proposed method is based on symmetry of the circuit configuration. The proposed method can be applied to not only odd-order filters but also even-order filters. As an example, a 5th-order complex RiCR filter is designed. The proposed filter is compared with the conventional ones from the view points of the gain characteristics, the number of the required elements and element value spread.
This paper presents a TDC based all-digital temperature sensor with small inaccuracy even at wide temperature range. The proposed sensor utilized CMOS inverters show different temperature characteristics to embed an oscillator that previous sensors have used as external component. Moreover, the temperature characteristic of a diode is used to improve the temperature inaccuracy. The sensor in 180nm CMOS process tested from -40°C to 200°C shows -2.56∼+2.84°C inaccuracy.
We propose a unified high precision SPICE model miniature triode tube series. The model formula was devised by high precision measurement data of 12AX7, 12AU7, 12AY7, 12AT7. In the conventional model, the perveance value and the amplification factor, which are the basic parameters expressing the I-V characteristic, have been given respectively as a constant for each vacuum tube. We have found that these values are the modulation coefficient by operation conditions depending on the electrode shape. We proposed a new physical model incorporating the physical phenomena of space charge modulation including the threshold vicinity and positive grid bias. As a result, we succeeded for the first time to express the modulation of amplification factor with small signal characteristics parameters which enables to simulate the complicated non-linear behavior such as distortion property of amplifier.
In this paper, two passive complex coefficient filters using piezoelectric transformers are proposed. The proposed frequency transformation is specialized for a complex coefficient filter using piezoelectric transformers. By applying the frequency transformation to a real first-order lowpass filter, we can obtain a first-order complex bandpass filter. The resulting circuit is realized by using a piezoelectric transformer, some reactance elements and terminating resistors. It is confirmed that the proposed circuit has complex bandpass characteristics through computer simulation and experiment. On the other hand, it is difficult to design higher order filters, because the circuit does not have the imaginary output. However, by allowing to use of a tight coupling transformer, a second-order complex bandpass filter can be obtained by using the proposed frequency transformation. The resulting circuit is realized by using two piezoelectric transformers, two tight coupling transformers, some reactance elements and terminating resistors. It is also confirmed that the proposed circuit has complex bandpass characteristics through computer simulation and experiment.
A technique to improve the power efficiency of switched capacitor DC-DC converters, which reuses the charge of parasitic capacitance in the circuit, has been reported. In this research, the charge recycling method is applied to the DC-DC converter derived from continued fraction expansion and the conversion efficiency is discussed. Simulation was performed using 0.18µm CMOS process parameters for verification. Adiabatic operation of the proposed circuit can be confirmed from simulation results.
This paper presents a new FinFET 4T-SRAM that is operated with differential write and single-end read mode, in the near-threshold region. To improve the read margin and the write stability, a 3T read/write assist circuit is added to the proposed SRAM. From the HSPICE simulation results in 20 nm predictive technology model (PTM), the proposed circuit has the same static noise margin (SNM), a shorter read/write time and smaller energy dissipation compared to conventional circuits.
In recent years, there is a movement to realize wireless sensor network by energy harvest. However, the power obtained by energy harvesting is very low. Therefore, ADC used for sensors need to have low power consumption. We realized low voltage and low power consumption by making the SAR ADC asynchronous by the delay circuit.
This paper proposes a systematic derivation of highly linear MOSFET-C filters using two control voltages. This method is an extension of the method given in Ref. (8). A reduction method in the number of MOSFETs is also shown. Computer simulations have shown that the proposed design method is appropriate in order to implement highly linear MOSFET-C filters using two control voltages.
A new method for realizing a zero voltage switching DC-DC converter is proposed. An additional circuit named charging and discharging circuit is introduced to realize zero voltage switching. Efficiency of a DC-DC converter is improved by using the proposed charging and discharging circuit, because variation of inductor current is suppressed. Switching timing for charging and discharging circuit are also explained. The proposed circuit is applied to a boost converter. Efficiency of the boost converter achieves 98.8%.
In this paper, we design and evaluate the 0.5V subthreshold filter-less digital PLL. Under the subthreshold region, it's very difficult for analog type PLL using LPF to operate at 0.5V power supply due to narrow signal voltage range. Thus, we design the filter-less digital PLL circuit using our proposed synchronization algorism. As a result, we succeed synchronization without LPF. Power consumption is 373nW at 1048kHz synchronous operation.
We propose an area reduction method of digital circuit part in β-expansion-based analog-to-digital converter (ADC). The digital parts of conventional β-expansion based ADCs use lookup table (LUT) to estimate effective β values, and to convert non-binary digital output from analog part to binary code. Unfortunately, increasing the conversion resolution (bit number) of the ADCs increases the chip area of the LUT. In this work, we estimate the effective β values by Newton's method and directly convert non-binary numbers to binary numbers without LUTs. As a result, when the conversion resolution of the ADCs is increased, the proposed method reduces the increase of the digital part area compared to the conventional LUT-based method.
This letter describes an analysis of the close to carrier phase noise characteristics of the Colpitts oscillator circuit with two or more crystal resonators. The open-loop impedance and the quality factor of a regular oscillation state are computed by using a nonlinear transistor model. Moreover, based on the Leeson’s model, the near carrier phase noises are estimated using the calculated Q-factors. As a result, it was shown by using a crystal filter that the phase noise close to carrier frequencies is improved.
In this paper, an analytical design of a complex coefficient transfer function with finite transmission zeros at D. C. is proposed. The minimum attenuation (ω < 0) of the proposed transfer function is described. The transfer function obtained from the special case of the proposed characteristic function can be realized as a complex RiCR filter. The validity of the proposed method is confirmed through numerical calculation.
In recent years, the number of mobile wireless devices that use the modulation such as QAM is increased, and it requires high-precision quadrature modulators and low-cost circuits composed of CMOS devices. In this paper, we propose a quadrature modulator, composed of a newly configured quadrature mixer with function to correct the phase error of LO signal, a flip-flop frequency divider for quadrature LO generation, and an RC-polyphase filter for delay correction. Moreover, we reveal that this circuit has compensation mechanism for the duty-cycle-error of the frequency-doubled-LO (2LO) input signal.
We propose the frequency multiplier to be applied ΔΣ technique that uses variable delay controlled by the correction ROM data. It can correct the temperature characteristic of a reference frequency oscillator. As a result of the system simulation, the fractional spurious of the proposed circuit are -129.37dBc at 4.98MHz.
The Cockcroft-Walton (CW) circuit is used in the many high-step-up isolated DC-DC converters. The input voltage in CW circuit includes some harmonic components. This paper models the frequency characteristics of a novel CW circuit, which is proposed in the past, by equivalent circuit and Fourier series expansion. It is clarified that the equivalent circuit accurately assesses the experimental frequency characteristics of the proposed CW circuit.
This paper presents a method for performance evaluation of general queueing systems that is important for designing IoT (Internet of Things) data processing systems. IoT has been paid great attention all over the world. There are a lot of IoT devices that connect Internet. In addition, IoT devices are many kinds. Hence, IoT data processing systems have to handle massive, many kinds of data. From the above, when we design IoT data processing systems, it is important to evaluate performance of general queueing systems. However, in general queueing systems, the exact solution that can evaluate performance is not available. Alternatively, we can evaluate it with discrete simulation. However, it spends much time. From the above reasons, we evaluate performance of general queueing systems by machine learning instead of discrete simulation. In addition, we validate what kind of teacher data we should use for machine learning.
Permanent magnet synchronous motors (PMSMs) have been used in numerous applications due to their many attractive characteristics, such as high power, high efficiency, and wide operating-speed range. Moreover, high-speed PMSM drive systems are used in various applications. In recent years, such systems have become much smaller and have come to have a higher power density. Because of the increase in the motor fundamental frequency in the high-speed region, it is necessary to reduce the control period. Conventionally, digital signal processors and microcomputers have been used for high-performance processers. The field-programmable gate array (FPGA) which is a logic-integrated circuit can also reduce the control period simply because of fast hardware performance. This paper proposes a high-speed PMSM drive system based on direct torque control (DTC) implemented in an FPGA. In this paper, the operating characteristics of the proposed system using a PMSM having a rated speed of 42,000 min-1 are showed. Furthermore, the effects of efficiency improvement and torque ripple reduction are examined experimentally.
Pulse fiber lasers have high beam quality and stability and are being used as industrial lasers. In recent years, pulse fiber lasers with higher power have been required for processing of difficult-to-cut materials and high speed processing. Accordingly, as one of methods for improving power of pulse fiber lasers, various systems based on coherent beam combining have been proposed. It is necessary for coherent beam combining that the optical phase and polarizations of individual beams to be combined are kept the same. Therefore, some system for adjusting them is needed.
In this paper, we propose a method for adjusting the optical phase of beams to be combined, by optical path length control in an all fiber coherent beam combining system which was developed through our past work. This system is one such that the optical phase and polarizations are kept the same by controlling only the optical phase because polarization changes are automatically compensated. We also confirm effectiveness of our method for controlling the optical phase through computer simulation.
In Japan, university students have an obligation to enhance the quality of learning at the university. Because learning at high school and learning at university are qualitatively different. Therefore, university students must transition from a passive learning style of subjective learning style. In order to acquire these basic forces, “Study Skills” are attracting attention in Japan. In this research, we focus on the “Task Partitioning Method” (Method of partitioning and processing tasks) which is one of the study skills. It is said that the time required for the processing of tasks can generally be shortened by using the task partitioning method. However, it is not clear how to see how to use the task partitioning method.
Therefore, in this research we clarify how to use the task partitioning method through analyzing the queuing models. In this research, tasks are assigned to the student by teachers and we assume the student processes the tasks. This process (The Students Task Processing Process) is regarded as a queuing models. We analyzed this queuing models by simulation and examined the influence of various task partitioning methods on task processing time and amount of task processing. We present graphs and knowledge which were obtained by the performance evaluation of the models to the university student and give them a chance to learn how to study.