In order to surpass the thermodynamic Shockley-Queisser limit of energy conversion efficiency of single-junction solar cells, advanced concepts using multi-junction tandem structure and quantum nanostructure are presently under intense research. Recent developments and future research opportunities in high-efficiency photovoltaics technology based on quantum dot superlattice are reviewed.

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This letter describes a soft pre-charge high voltage switch for a program/erase charge pump (P/E Pump) with NAND flash memory using an external high voltage of 12V. The use of a external high voltage reduces the P/E Pump stage and improves the power efficiency. The external high voltage is used as input power of the P/E Pump. The soft pre-charge high voltage switch is proposed to transfer the external high voltage without a breakdown issue. The proposed high voltage switch passes the external high voltage of +12V to be ramped up linearly at the start-up phase.

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This paper presents the design and implementation of a high performance sparse matrix-vector multiplication (SpMV) on field-programmable gate array (FPGA). By proposing a new storage format to compress the indexes of non-zero elements by exploiting the substructure of the sparse matrix, our SpMV implementation on a reconfigurable computing platform with a multi-channel memory subsystem is capable of obtaining similar performance by using a single FPGA to that of a highly optimized BFS implementation on a commercial heterogeneous system containing four FPGAs.

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A silicon Mach-Zehnder modulator with a low-loss phase shifter formed by restricted-depth doping is fabricated and characterized. The phase shifter has a PN junction at the bottom of the rib waveguide, whereas the top of the rib is un-doped. Device simulations confirm that the phase-shifter loss is reduced by 26−28% with an increased phase-shifter length to keep a π phase shift with the same bias condition in comparison with a conventional PN junction through the whole depth. An optical loss as low as 1.6dB has been achieved in the fabricated phase shifter with a 6-mm length. The Mach-Zehnder modulator with the phase shifter has a fiber-to-fiber loss of 9dB. 10-Gbps non-return-to-zero on-off keying with extinction ratio of 11dB is demonstrated under push-pull operation with a 6V_pp driving voltage on each arm.

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A compact planar ultra-wideband (UWB) antenna with dual band-notches characteristics is presented. The proposed antenna utilizes a T-shaped stub on the radiating patch and U-shaped slot on ground to generate two notched bands at 3.5 and 5.5GHz with little effect on the radiation patterns. Under this circumstance, the antenna not only exhibits a wide operational frequency band from 3 to over 12GHz with good rejection of interference to WiMAX and WLAN bands, but also performs an effective manage function owing to two controllable notched bands by tuning the structures of the T-shaped stub and U-shaped slot independently. For verification, the proposed antenna is fabricated and measured. Good agreement between measured and simulated results is observed.

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A uniplanar, compact electromagnetic band-gap (UC-EBG) structure based on modified semi-Spidron fractal and meander-line strip (SFM-EBG) patterning is proposed. The semi-Spidron fractal geometry significantly increases the equivalent capacitance, whereas meander-line strips increase the equivalent inductance; as a result, the proposed design can be used to successfully miniaturize an EBG structure having a wide operating bandwidth. The measurement results show that a center frequency reduction of 32.14% as compared to that achieved by a conventional UC-EBG structure can be achieved by utilizing this proposed structure. The SFM-EBG structure has a measured operating bandwidth of 39.7% (3.33-4.98GHz), which is wider than that of a conventional UC-EBG (31%).

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This paper presents a novel delay model for MCML circuits valid in all the regions of operation of the MOS transistor, i.e., weak inversion (sub-threshold), moderate inversion (near-threshold) and strong inversion. The proposed delay model was employed to develop an automated methodology for the energy-efficient design of such circuits. The tradeoff that can be realized between energy and delay was investigated. Experiments were performed using different technologies to understand the impact of technology scaling on that tradeoff too. Major results of this study are as follows. In a circuit designed for minimum energy consumption, the minimum energy point occurs in the near-threshold region and a noticeable reduction in delay is possible by relaxing the energy constraint. Moreover, technology scaling positively affects this tradeoff.

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Side-channel analysis is an important strategy for Hardware Trojan (HT) detection. Karhunen-Love (K-L) expansion can be used to improve side-channel signals analysis quality, As an auxiliary post-processing method of K-L expansion, One Class Support Vector Machine (OCSVM) is introduced to achieve ICs intelligent classification. With the OCSVM and the power traces of Genuine ICs (Genuines), a hyper sphere can be built to distinguish the Trojan ICs (Trojans) from Genuines. The effectiveness of the proposed approach is experimentally demonstrated using power simulations performed on a representative circuit with several different Trojan circuits.

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