Elliptic curve cryptography (ECC), one of the asymmetric cryptography, is widely used in practical security applications, especially in the Internet of Things (IoT) applications. This paper presents a low-power reconfigurable architecture for ECC, which is capable of resisting simple power analysis attacks (SPA) and can be configured to support all of point operations and modular operations on 160/192/224/256-bit field orders over GF(p). Point multiplication (PM) is the most complex and time-consuming operation of ECC, while modular multiplication (MM) and modular division (MD) have high computational complexity among modular operations. For decreasing power dissipation and increasing reconfigurable capability, a Reconfigurable Modular Multiplication Algorithm and Reconfigurable Modular Division Algorithm are proposed, and MM and MD are implemented by two adder units. Combining with the optimization of operation scheduling of PM, on 55 nm CMOS ASIC platform, the proposed architecture takes 0.96, 1.37, 1.87, 2.44 ms and consumes 8.29, 11.86, 16.20, 21.13 uJ to perform one PM on 160-bit, 192-bit, 224-bit, 256-bit field orders. It occupies 56.03 k gate area and has a power of 8.66 mW. The implementation results demonstrate that the proposed architecture outperforms the other contemporary designs reported in the literature in terms of area and configurability.

In conclusion, an initialization method has been introduced and studied to improve the SET speed in PCM. Before experiment verification, a two-dimensional finite analysis is used, and the results illustrate the proposed method is feasible to improve SET speed. Next, the R-I performances of the discrete PCM device and the resistance distributions of a 64 M bits PCM test chip with and without the initialization have been studied and analyzed, which confirms that the writing speed has been greatly improved. At the same time, the resistance distribution for the repeated initialization operations suggest that a large number of PCM cells have been successfully changed to be in an intermediate state, which is thought that only a shorter current pulse can make the cells SET successfully in this case. Compared the transmission electron microscope (TEM) images before and after initialization, it is found that there are some small grains appeared after initialization, which indicates that the nucleation process of GST has been carried out, and only needs to provide energy for grain growth later.

Dependences of arc duration D and contact gap at arc extinction d on contact opening speed v are studied for break arcs generated in a 48VDC resistive circuit at constant contact opening speeds. The opening speed v is varied over a wide range from 0.05 to 0.5m/s. Circuit current while electrical contacts are closed I₀ is varied to 10A, 20A, 50A, 100A, 200A, and 300A. The following results were obtained. For each current I₀, the arc duration D decreased with increasing contact opening speed v. However, the D at I₀=300A was shorter than that at I₀=200A. On the other hand, the contact gap at arc extinction d tended to increase with increasing the I₀. However, the d at I₀=300A was shorter than that at I₀=200A. The d was almost constant with increasing the v for each current I₀ when the I₀ was lower than 200A. However, the d became shorter when the v was slower at I₀=200A and 300A. At the v=0.05m/s, for example, the d at I₀=300A was shorter than that at I₀=100A. To explain the cause of the results of the d, in addition, arc length just before extinction L were analyzed. The L tended to increase with increasing current I₀. The L was almost constant with increasing the v when the I₀ was lower than 200A. However, when I₀=200A and 300A, the L tended to become longer when the v was slower. The characteristics of the d will be discussed using the analyzed results of the L and motion of break arcs. At higher currents at I₀=200A and 300A, the shorter d at the slowest v was caused by wide motion of the arc spots on contact surfaces and larger deformation of break arcs.

Focusing on the planar slab structure of OLEDs, it is found the threshold value of the in-plane wave number at which the spectrum component of the electromagnetic field at the outermost boundary is divided into a radiation mode and a guided (confined) mode. This is equivalent to the total reflection condition in the ray optics. The spectral integral of the Poynting power was calculated from the boundary values of the electromagnetic fields in each. Both become average power and reactive power respectively, and the sum of them becomes the total volt-amperes from the light emitting dipole. Therefore, the ratio of average power to this total is the power factor that can be a quantitative index of light extraction.

In this paper, a planar balun having simple and compact features with slit ground was proposed. The operating frequency can be designed by the length and position of the defected ground slits. The 20 dB bandwidth of the common mode rejection ratio of the measuring balun was over 90%.