Cu-Mo alloy carries forward not only high electrical conductivity and high thermal conductivity from Cu but also high hardness from Mo, which makes it a promising potential application in electrical contact fields. In this paper, arc characteristic and erosion characteristic of Cu-Mo contacts are studied with a bridge-type contact high speed break mechanism on DC270 V/200 A load condition. And in each experiment group, 2500 times break operations are carried out. During every break operation, a high-speed AD card is used to record voltage and current signal of the arc, a high-speed camera is applied to record arcing process, and the temperature of contacts and arc are acquired by thermocouple and spectrometer, respectively. The mass and contact resistance of contacts are measured before and after every group experiment. Besides, the photograph of contact surface is taken by SEM to help analyze the erosion characteristic. The comparison between Cu-Mo contacts and Cu contacts indicates that although Cu contacts have a better electrical conductivity and thermal conductivity, Cu-Mo contacts can decrease the temperature of arc to prevent thermal breakdown, and they are also harder to be ablated and have a longer life span.

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A gold coated carbon nanotubes composite was used as a contact material in Micro-Electrical-Mechanical-System (MEMS) switches. The switching contact was tested under typical conditions of MEMS relay applications: load voltage of 4 V, contact force of 1 mN, and load current varied between 20-200 mA. This paper focuses on the wear process over switching lifetime, and the dependence of the wear area on the current is discussed. It was shown that the contact was going to fail when the wear area approached the whole contact area, at which point the contact resistance increased sharply to three times the nominal resistance.

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Copper arc runners are fixed on silver electrical contacts. Break arcs are generated between the contacts in a DC resistive circuit. Circuit current when contacts are closed is 10A. Supply voltage is changed from 200V to 450V. The following results are shown. Cathode spots stay on the cathode surface but anode spots run on the runner when the supply voltage is 250V and over. In cases of the supply voltage is greater than 250V, the break arcs run on the runner when the arcs are successfully extinguished, and stays on the runner in cases of the failure of arc extinction. The arc lengths just before arc extinction with or without the runners are also investigated. The arc lengths are the same with or without the runners for each supply voltage.

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Break operations of DC inductive (L=20mH) load currents up to about 5A with 14V were conducted in air with AgSnO₂ contact pairs under different contact opening speeds, first up to 20mm/s and then to 200mm/s. Average break arc duration at each current level was calculated under the respective opening speeds. While break arc durations became shorter with increases in the opening speeds at larger current levels, such reduction tendencies were less significant with an increase of the contact opening speed from 20mm/s to 200mm/s, even when operated to break a load current of 5A. Both load current levels and contact opening speed levels seem to exhibit certain roles for realizing arc shortening effects.

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We experimentally investigated the impact of the mode filtering technique on the performances of pulse amplification in a fiber with a large core diameter. The technique was applied to a femtosecond pulse amplifier, and was based on a large area double-clad Yb-doped fiber. The mode filtering enabled selective excitation of the lowest transverse mode with minimal contamination of higher order modes. The output pulses with 110 fs duration, > 30 nJ pulse energy (> 3 W average power), and clean spatial/temporal profiles were successfully generated. Benefits of this technique are also discussed.

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This paper describes 0.8-/1.5-GHz-band GaAs-HBT power amplifier modules with a newly designed analog bias control scheme. This scheme has two features. One is to achieve approximately linear quiescent current control using not a BiFET process but only the usual HBT process. The other is to help improve linearity under reduced supply voltage and lower quiescent current operation. The following two key techniques are incorporated into the bias scheme. The first is to employ two different kinds of bias circuits: emitter follower bias and current injection bias. The second is the unique current injection bias block, based on the successful combination of an input buffer with an emitter resistance load and a current mirror. These techniques allow quiescent current control that is almost proportional to an externally applied analog control voltage. To confirm the effectiveness of the scheme, 0.8-GHz-band and 1.5-GHz-band power amplifier modules were designed and fabricated using the usual HBT process. Measurements conducted under the conditions of a 3.4V supply voltage and an HSDPA WCDMA modulated signal are as follows. The 0.8-GHz-band amplifier can deliver a 28-dBm output power (P_out), a 28.4-dB power gain (G_p), and 42% PAE while restricting the ACLR to less than -40dBc. For the 1.5-GHz-band amplifier, 28dBm of P_out, 29dB of G_p, and 41% of PAE are obtained with the same ACLR levels. The measurements also confirm that the quiescent current for the second stage in the amplifiers is approximately linearly changed from 14mA to 58mA over a control voltage ranging from 1.1V to 2.2V. In addition, our measured DG.09-based current dissipation with both supply voltage and analog bias controls is as low as 16.9mA, showing that the analog bias control scheme enables an average current reduction of more than 20%, as compared to a conventional supply voltage and two-step quiescent current control.

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Two-track squeeze and adjacent track interference (ATI) are major barriers to increasing track density in hard disk drives (HDD). These depend on skew angles made by a magnetic head and circumferential direction on a magnetic disk. This paper describes relationships between the skew angle and the magnetic core width (MCW) which affects two-track squeeze and ATI performance. We propose a design concept of a track pitch profile at different skew angles considering MCW. Equivalent robustness of ATI performance on different skew angle conditions is obtained with the optimized track pitch.

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