IEICE Transactions on Electronics
Online ISSN : 1745-1353
Print ISSN : 0916-8524
E106.C 巻, 9 号
選択された号の論文の4件中1~4を表示しています
Regular Section
  • Akihiko HIRATA, Tubasa SAIJO, Yuma KAWAMOTO, Tadao NAGATSUMA, Issei WA ...
    原稿種別: PAPER
    専門分野: Microwaves, Millimeter-Waves
    2023 年 E106.C 巻 9 号 p. 458-465
    発行日: 2023/09/01
    公開日: 2023/09/01
    [早期公開] 公開日: 2023/03/09
    ジャーナル フリー

    We experimentally evaluated transmission characteristics of 120-GHz-band close-proximity wireless link that employs a split-ring resonator (SRR) millimeter-wave (MMW) absorber integrated on planar slot antennas in 120-GHz-band close-proximity wireless links. We fabricated the SRR MMW absorber made of a 0.28-μm-thick TaN film on a quartz substrate, and integrated it on planar single slot antennas. When the TaN SRRs are not integrated on the planar slot antennas, multiple reflections between the two antennas occur, and a >10-dB fluctuation of S21 at 100-140GHz is observed. When the TaN SRRs are integrated on the planar antennas, the fluctuation of S21 is suppressed to be 3.5dB at 100-140GHz. However, the transmittance of the close-proximity wireless link decreases by integrating TaN SRRs on the planar slot antenna because of reflection at the quartz substrate surface. The integration of the radiator that is composed of single SRR with two capacitors just above the slot antenna increased S21 by 3.5dB at 125GHz. We conducted a data transmission experiment over a close-proximity wireless link that employs radiator-and-TaN-SRR-integrated slot antennas for Tx and Rx, and succeeded to transmit 10-Gbit/s data over the close-proximity wireless link for the first time.

  • Tadayoshi ENOMOTO, Nobuaki KOBAYASHI
    原稿種別: PAPER
    専門分野: Electronic Circuits
    2023 年 E106.C 巻 9 号 p. 466-476
    発行日: 2023/09/01
    公開日: 2023/09/01
    [早期公開] 公開日: 2023/03/16
    ジャーナル フリー

    We developed a self-controllable voltage level (SVL) circuit and applied this circuit to a single-power-supply, six-transistor complementary metal-oxide-semiconductor static random-access memory (SRAM) to not only improve both write and read performances but also to achieve low standby power and data retention (holding) capability. The SVL circuit comprises only three MOSFETs (i.e., pull-up, pull-down and bypass MOSFETs). The SVL circuit is able to adaptively generate both optimal memory cell voltages and word line voltages depending on which mode of operation (i.e., write, read or hold operation) was used. The write margin (VWM) and read margin (VRM) of the developed (dvlp) SRAM at a supply voltage (VDD) of 1V were 0.470 and 0.1923V, respectively. These values were 1.309 and 2.093 times VWM and VRM of the conventional (conv) SRAM, respectively. At a large threshold voltage (Vt) variability (=+6σ), the minimum power supply voltage (VMin) for the write operation of the conv SRAM was 0.37V, whereas it decreased to 0.22V for the dvlp SRAM. VMin for the read operation of the conv SRAM was 1.05V when the Vt variability (=-6σ) was large, but the dvlp SRAM lowered it to 0.41V. These results show that the SVL circuit expands the operating voltage range for both write and read operations to lower voltages. The dvlp SRAM reduces the standby power consumption (PST) while retaining data. The measured PST of the 2k-bit, 90-nm dvlp SRAM was only 0.957µW at VDD=1.0V, which was 9.46% of PST of the conv SRAM (10.12µW). The Si area overhead of the SVL circuits was only 1.383% of the dvlp SRAM.

  • Yaxin MEI, Takashi OHSAWA
    原稿種別: PAPER
    専門分野: Integrated Electronics
    2023 年 E106.C 巻 9 号 p. 477-485
    発行日: 2023/09/01
    公開日: 2023/09/01
    [早期公開] 公開日: 2023/03/08
    ジャーナル フリー

    A fully analog pipelined deep neural network (DNN) accelerator is proposed, which is constructed by using pipeline registers based on master-slave switched capacitors. The idea of the master-slave switched capacitors is an analog equivalent of the delayed flip-flop (D-FF) which has been used as a digital pipeline register. To estimate the performance of the pipeline register, it is applied to a conventional DNN which performs non-pipeline operation. Compared with the conventional DNN, the cycle time is reduced by 61.5% and data rate is increased by 160%. The accuracy reaches 99.6% in MNIST classification test. The energy consumption per classification is reduced by 88.2% to 0.128µJ, achieving an energy efficiency of 1.05TOPS/W and a throughput of 0.538TOPS in 180nm technology node.

  • Koichi MAEZAWA, Umer FAROOQ, Masayuki MORI
    原稿種別: BRIEF PAPER
    専門分野: Electronic Circuits
    2023 年 E106.C 巻 9 号 p. 486-490
    発行日: 2023/09/01
    公開日: 2023/09/01
    [早期公開] 公開日: 2023/03/16
    ジャーナル フリー

    A novel displacement sensor was proposed based on a frequency delta-sigma modulator (FDSM) employing a microwave oscillator. To demonstrate basic operation, we fabricated a stylus surface profiler using a cylindrical cavity resonator, where one end of the cavity is replaced by a thin metal diaphragm with a stylus probe tip. Good surface profile was successfully obtained with this device. A 10 nm depth trench was clearly observed together with a 10 µm trench in a single scan without gain control. This result clearly demonstrates an extremely wide dynamic range of the FDSM displacement sensors.

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