Journal of The Japan Institute of Electronics Packaging
Online ISSN : 1884-121X
Print ISSN : 1343-9677
ISSN-L : 1343-9677
Volume 8, Issue 3
Displaying 1-14 of 14 articles from this issue
  • Mikio NISHIHARA
    2005 Volume 8 Issue 3 Pages 169
    Published: May 01, 2005
    Released on J-STAGE: March 18, 2010
    JOURNAL FREE ACCESS
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  • Yoshihiko IMANAKA
    2005 Volume 8 Issue 3 Pages 170-177
    Published: May 01, 2005
    Released on J-STAGE: March 18, 2010
    JOURNAL FREE ACCESS
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  • Hideya MAKI, Makoto INOUE, Takashi KOSAKA, Hisahiro YASUDA
    2005 Volume 8 Issue 3 Pages 178-182
    Published: May 01, 2005
    Released on J-STAGE: March 18, 2010
    JOURNAL FREE ACCESS
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  • Hirohiko WATANABE
    2005 Volume 8 Issue 3 Pages 183-187
    Published: May 01, 2005
    Released on J-STAGE: March 18, 2010
    JOURNAL FREE ACCESS
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  • Tadashi MAEDA
    2005 Volume 8 Issue 3 Pages 188-193
    Published: May 01, 2005
    Released on J-STAGE: March 18, 2010
    JOURNAL FREE ACCESS
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  • Sakae KITAJO
    2005 Volume 8 Issue 3 Pages 194-198
    Published: May 01, 2005
    Released on J-STAGE: March 18, 2010
    JOURNAL FREE ACCESS
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  • Isao TSUKIMOTO, Masaki HASHIZUME, Hiroyuki YOTSUYANAGI, Takeomi TAMESA ...
    2005 Volume 8 Issue 3 Pages 199-207
    Published: May 01, 2005
    Released on J-STAGE: March 18, 2010
    JOURNAL FREE ACCESS
    In this paper, a supply-current test method is proposed for detecting open faults in logic circuits made of TTL ICs on printed circuit boards. This method is applicable even if there is any variation of the supply current among the ICs used. In this method, variation of the supply current in a logic circuit is modeled as a Gaussian distribution and a statistical analysis method with level of significance is used for fault detection. In this paper, the fault coverage of the test method is evaluated experimentally. In the experimental evaluation, test input vectors of the supply-current test method are generated for detecting single open faults of signal lines in ISCAS-85 benchmark circuits made of TTL SSIs. The results show that more open faults can be detected by this test method than by a functional test method if the deviation (σ/μ) of the supply current in each SSI used is smaller than 1.1%.
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  • Toshimitsu NAGAO, Yutaka FUJIWARA, Hiroshi HOSHIKA, Hidekazu MIYAKE
    2005 Volume 8 Issue 3 Pages 208-214
    Published: May 01, 2005
    Released on J-STAGE: March 18, 2010
    JOURNAL FREE ACCESS
    The shear fracture and pull fracture loads of Sn-3.5Ag solder balls attached to BGA substrates, with and without Ni plating layers, were measured as a function of the time exposed to 150°C dry air. Sn-Ag alloy plating was applied as the topcoat of the substrate to confirm the wettability of the molten solder balls. Cu dissolved into the molten solder balls from the substrate without Ni plating layer; the Cu content of these solder balls exceeded the Sn-Ag-Cu eutectic composition. The high Cu content of the solder balls caused a decrease in their microhardness after the 150°C aging. The Niplating layer increased the shear fracture loads of the solder balls, corresponding to the inhibition of void formation in the balls. The pull-fracture load, which shows the strength of the solder-intermetallic compound layer interface, decreased with Ni plating.
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  • Won-Keun KIM, Toru IKEDA, Noriyuki MIYAZAKI
    2005 Volume 8 Issue 3 Pages 215-224
    Published: May 01, 2005
    Released on J-STAGE: March 18, 2010
    JOURNAL FREE ACCESS
    Anisotropic conductive adhesive film (ACF) has been used for electronic assemblies such as the connection between a liquid crystal display (LCD) panel and a flexible printed circuit board (FPC) . Recently, ACF is expected to be a key technology in flip-chip and system-in-package (SiP) packaging. The goal of our work is to provide an optimum design scheme to achieve the best combination of electrical performance and mechanical reliability for electronic packages using ACF. The stress intensity factors of an interface crack between jointed dissimilar materials were utilized for the evaluation of the delamination occurring in a flip chip connected with ACF under moisture/reflow sensitivity tests.
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  • Takashi NAKAMORI, Makoto SUENAGA, Daisuke HIRAKAWA, Yasuhide OHNO, Tai ...
    2005 Volume 8 Issue 3 Pages 225-232
    Published: May 01, 2005
    Released on J-STAGE: March 18, 2010
    JOURNAL FREE ACCESS
    In this study, we examined how to lower the reflow temperature using a method in which oxide film is removed by generating hydrogen radicals in a vacuum. As a result, the joint strength obtained was almost equal to that of Sn-37Pb solder. To confirm the possibility of reflow processes without flux, the reduction effect of hydrogen radicals and SnO2were considered. We increased the reflow temperature up to 10°C higher than the melting point, after removing the oxide film which was previously melted at a temperature lower than the melting point by generating hydrogen radicals without using flux. As a result, the same levels of surface properties and joint strength were obtained, and void creation was suppressed. Therefore, we conclude that introducing hydrogen radicals makes it possible to reflow process lead-free solders such as Sn-3.0Ag-0.5Cu without using flux and without void creation. In addition, this method was applied to bump formation reflow.
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  • Kiyoshi ITO, Naoki FUKUMURO, Shinji YAE, Hitoshi MATSUDA
    2005 Volume 8 Issue 3 Pages 233-236
    Published: May 01, 2005
    Released on J-STAGE: March 18, 2010
    JOURNAL FREE ACCESS
    The objective of this study is to clarify the effect of the composition of electroless pure Ni solutions on the microstructure and electrical conductivity of deposited films. The carbon, sulfur and boron contents included as impurities in the samples have been measured, showing changes in the carbon content ranging from 0.01 to 0.19% by mass. The crystal structure of the deposited films was investigated by means of cross-sectional TEM observation, and investigation of the obtained electron diffraction patterns reveals that the crystals of the deposited films are generally oriented randomly. The grain size is uniform throughout the investigated film (1μm), though the diameter varies from 10 nm to 120 nm with changes in the solution composition: relatively coarse grains are observed in films deposited from a solution with a high hydrazine concentration. The addition of saccharin sodium generally induces grain growth. The results of the measurements suggest an adequate correlation between the carbon content and the grain size, and it has become evident that the electrical conductivity of the films decreases linearly with an increase of the carbon content.
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  • Tomoko INOGUCHI, Satoshi MORIYA, Takashi YAMAMOTO, Yukihiko ARAI, Tets ...
    2005 Volume 8 Issue 3 Pages 237-242
    Published: May 01, 2005
    Released on J-STAGE: March 18, 2010
    JOURNAL FREE ACCESS
    For optical Z-connections in three-dimensional optical circuits of high performance computers, we fabricated waveguide films with surface-normal mirrors using the“built-in mask method”. On a glass substrate with a mask of core patterns a removable layer, a clad film, and a photo-definable core layer were formed. Both the vertical and tilted ultra-violet exposures constructed waveguide cores 4-60-μm wide with beveled core walls for mirrors. Film waveguides were completed by substrate removal. The built-in mask is re-usable to duplicate the film waveguides with fine-pitch mirrors of arbitrary directions with maximized positional accuracy and with minimized processing time and substrate consumption.
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  • Kenji HAGIWARA
    2005 Volume 8 Issue 3 Pages 243-250
    Published: May 01, 2005
    Released on J-STAGE: March 18, 2010
    JOURNAL FREE ACCESS
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  • Tadashi TATENO, Nobutaka ITO, Qiang YU
    2005 Volume 8 Issue 3 Pages 251-257
    Published: May 01, 2005
    Released on J-STAGE: March 18, 2010
    JOURNAL FREE ACCESS
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