Polyimide-based device-embedded substrates significantly increase the density and performance of electronic circuits by using a chip-stack structure with a thin-film insulation material. Typical thicknesses of our substrates are 0.2 mm for a 4-layer circuit embedded with one chip and 0.4 mm for an 8-layer circuit with 2 stacked chips. These substrates are produced using a co-lamination process, which is suitable for wiring within a high-layer-count circuit board and multi-chip embedding.
For this study, a test vehicle, 0.9 mm in thickness and containing a 3-chip stack, was produced and tested to ensure reliability. The reliability of the test vehicle was verified under the conditions including a three-cycle reflow test after soaking at 30°C 60%Rh for 192 hours (JEDEC MSL3), a HAST at 130°C 85%Rh for 336 hours, and a thermal cycling test -40°C to 125°C for 500 cycles.
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