An addition of selenic acid to copper electrolyte increases the exchanging current density (i₀) and the cathodic change transfer coefficient (a_c) . Change transfer resistance decreases and current distribution appears to be determined mainly by the ohmic drop of the electrolyte. The addition of 200 and 1000 g/m³ of selenic acid, decreases the Wa (Wagner) number less than by one. This causes non-uniform current distribution which causes humps on the bump surroundings. Bumps with different surrounding hump heights have been electrodeposited with the selenic acid additive. The trapped conductive particles on the bump with different hump heights are counted after COG (Chip on Glass) interconnection with ACF (Anisotropic Conductive Film) . Bumps with 8 to 11μm hump heights trap four times more conductive particles when compared to the flat shaped bumps.

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In order to maintain the bonding strength of solder balls on the electroless gold plated TAB tape carrier, it is necessary to plate a thinner gold plating than on the electroplated TAB tape carrier. We analyzed some bonding interfaces by an EDX, and thought the mechanism for the peeling of solder balls on the electroless gold plated TAB tape carrier. In the case of at least 0.4-μm and thicker electroless gold plating, the gold concentrates at the interface and the gold-tin intermetallics is formed by heat-aging after reflow soldering of solder balls. Nickel easily diffuses into the intermetallics. Phosphorus which exists in the electroless nickel plating is left and the fragile phosphorus-enriched layer is formed at the interface because the diffusion rate is slower than that of nickel. It is considered that the destruction is occurred around the layer.

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The soldering flux residue with the cracked surface adsorbs moisture on the surface of its own, and this moisture adsorption causes following problems: insulation deterioration by ionic migration, dielectric breakdown, and so forth. As a general rule, for the insulator with the cracked surface, to quantify the surface hygroscopicity (the property of the moisture adsorption on the surface) is the decisive and effective factor in evaluating the electrical reliability of that. However, few reports regarding this issue have been published; therefore we have tackled it. In consequence, measuring the dielectric loss tangent of the insulator in damp offers a quantitative evaluation method for characterizing the surface hygroscopicity associated with the insulation reliability. And we applied this measurement to the flux residue with the cracked surface. As a result, we obtained a valuable piece of information to forecast the occurrence of ionic migration for the flux residue.

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The requirement for miniaturization of printed circuit boards has been increased with downsizing of the electronic devices. The conventional multi-layer printed circuits boards are facing the limitation of wiring densities. Therefore, build-up process has been paid attention as a new multi-layer printed circuit board manufacturing process. This new technology has adapted the micro via-holes for connection between each conductive layer. The micro via-holes filled with copper metal can minimize signal propagation delay by via-on-via connection structure. However, micro via-holes filling is difficult by means of the conventional plating process or the electrical conductive paste. Concentration of copper sulfate in the plating bath is greatly influenced to the property of via-filling. Also, the via-filling with copper can be achieved by electroplating using properly selected additives. It was confirmed that filling condition improved by the addition of SPS and PEG-4000. We confirmed that copper sulfate concentration and selection of additive in copper sulfate plating bath were the key factors to fill the viaholes.

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We investigated the thermal cycle properties of Cu and Al circuit substrates using FEM analysis. The thermal stress in AIN for the Cu circuit substrate is larger than the Al circuit substrate and it increases as the thermal cycling proceeds. The Mises strain in the solder which joins the Si chip on the Cu circuit substrate is larger than the Al circuit substrate, and the fatigue life of the solder on the Al circuit substrate is estimated to be about 1400 cycles longer than the Cu circuit substrate. These results are due to the difference of the work hardening rate of Cu and Al. Cu and Al circuits have a plastic deformation during the thermal cycling, thus, Cu becomes harder due to its large work hardening. On the other hand, since the work hardening rate of Al is much less than Cu, the flow stress of Al does not increase with thermal cycling. It is suggested that using Cu lowers the reliability of power modules.

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Flip chip attach technology has many advantages and is considered one of the most important technology in the micro joining field. However, the flip chip rework is difficult when the flip chip bonding is formed on the high density card. We developed new flip chip rework method using the solder capped chip technology. In this technology, Sn-37Pb solder, which is neccessary to form the flip chip joint again, is applied on Pb-3Sn bumps of bare chip by the paste printing method. That solder capped chip was used as the replacement chip on the rework process. This report describes the development of flip chip rework method by solder capped chip.

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We have studied and learned that there are many advantages with the micro bump formation using the electroless plating method. Also the study on the usefulness of the process has been reported. This time we have experimented bonding TAB tapes on to the electroless plated bumps formed LCD driver IC. The results from the visual appearance seen from SEM photos and the break mode of the pull tests conducted on the bonded area shows that proper ILB conditions were found.

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