In this paper, we describe technologies to produce fine-pitch Cu wiring that provides high reliability and connects between chips for 2.1D/2.5D packaging. We have developed a semi-additive process to fabricate L/S = 1/1 μm wiring on an organic dielectric layer. The wiring uses Metal Cap barrier applied to LSI technology in order to suppress Cu diffusion and corrosion. This cap barrier oxidizes to form a passivation layer which prevents corrosion of the Cu wiring. The reliability of this wiring has been verified under HAST (Highly Accelerated temperature and humidity Stress Test) conditions, with a CoWP barrier in particular realizing higher reliability.

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Fine pitch interconnection using a flip-chip method is a key technology to achieve ultra-high density packaging on 2.1D/2.5D/3D integrated devices. As the solder bump size gets smaller for fine pitch applications, controlling the properties of solder joints becomes more important for chip package interaction (CPI) and electro-migration (EM) performance. The electro-plating method is widely used to fabricate fine pitch bumps; however solder compositions are limited to pure Sn or some binary solders such as Sn-Ag, Sn-Cu, etc. Hence, a bumping technology with fine pitch capability and solder alloy flexibility is needed. Injection Molded Solder (IMS) is an advanced solder bumping technology for use on wafer and laminate. IMS is a very simple technology, and solder bumps can be formed by the injection of molten solder into holes of resist material. Therefore, solder alloys can be flexibly selected, and there is a high capability of fine pitch applications. We fabricated a prototype tool to develop IMS bumping technology on wafers. In parallel, we developed the high thermal durability resist material because the resist material must be stable at high temperatures (around 250 degrees C) during the IMS process and be perfectly stripped after the IMS operation without any residue on the surface of wafers. We successfully demonstrated fine pitch solder bumping down to 40 μm pitch and 20 μm in diameter with Sn-3wt%Ag-0.5wt%Cu using the prototype tool and developed resist material. In this paper, we introduce the IMS technology and development activities toward the commercialization of this technology.

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Basic solder-paste printer performance evaluation considers to what extent the solder paste loaded in the metal mask opening is transferred to the pad surface of a printed circuit board without losing shape or quantity.
The resistance of the solder paste against the wall surface of the metal mask opening greatly influences the results of the transfer, but traditionally, there has been no way to ascertain this resistance as a numerical value.
To address this problem, we developed a rheology analyzer that can evaluate printability by simulating the flow of the solder paste in the metal mask opening and measuring the resistance of the solder paste against the wall surface of the opening.
As a result, it is now possible to ascertain how the transfer quantity of subject materials changes with the pressure applied at the time of printing as a numerical value.

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