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Kazuaki UTSUMI
2000 Volume 3 Issue 2 Pages
93
Published: March 01, 2000
Released on J-STAGE: March 18, 2010
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Norio NAKAJIMA
2000 Volume 3 Issue 2 Pages
94-97
Published: March 01, 2000
Released on J-STAGE: March 18, 2010
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Hideya MAKI, Osamu TAKAHASHI, Shouichi SEKIGUCHI
2000 Volume 3 Issue 2 Pages
98-102
Published: March 01, 2000
Released on J-STAGE: March 18, 2010
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Susumu HONDA
2000 Volume 3 Issue 2 Pages
103-107
Published: March 01, 2000
Released on J-STAGE: March 18, 2010
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Kuniaki TAKAHASHI
2000 Volume 3 Issue 2 Pages
108-113
Published: March 01, 2000
Released on J-STAGE: March 18, 2010
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Hideki IWAKI, Yutaka TAGUCHI, Yoshihiro BESSHO, Kazuo EDA
2000 Volume 3 Issue 2 Pages
114-119
Published: March 01, 2000
Released on J-STAGE: March 18, 2010
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In order to design packaging in GHz frequency range, high frequency electrical properties of electrically discontinuous regions on transmission lines were characterized. Especially, material constants of the substrate and an equivalent circuit of a via hole in an ALIVH substrate, which has any layer interstitial via hole structure, and flip chip interconnecting region using SBB technology were measured using a resonant method and were analyzed using three dimensional electromagnetic simulation. Consequently, the inductance of about 0.5 millimeter length via hole in the ALIVH substrate was about 0.6nH. The inductance of SBB interconnecting region was less than 0.1nH and was equal to about 10% of one millimeter length wirebond inductance. Therefore the SBB flip chip interconnecting technology were found to be good enough to apply to high speed digital systems up to 1GHz.
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Hiroji YAMADA, Kenji SEKINE, Kikuo FUKUSHIMA, Kouzou HIROKAWA, Kiichi ...
2000 Volume 3 Issue 2 Pages
120-126
Published: March 01, 2000
Released on J-STAGE: October 27, 2010
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As an approach for the damage and disconnection improvement of wiring patterns on a resin-molded high frequency MCM, we have developed the filler's diameter-shrank and uniformed novel resin. It's availability was investigated from both standpoints of MCM process and RF performances. It was revealed that the surface flatness of two kinds of resins for chip mold and interconnection were, respectively, achieved to be about 0.44μm and 0.25μm by the introduction of the resin containing Si-fillers with less than 10μm-diameter, leading to drastically improvement for the damage and disconnection of wiring patterns. Also, it was found that the developed resin can be simultaneously planed away together with Au bump and Cu electrodes. A power amplifier MCM with two Si-MOSFET for a cellular system were fabricated under the above investigations and the RF performances were estimated. In the MCM, the output power of 28.5 dBm and power efficiency of 40% were obtained at an operating frequency of 1.42GHz. From these results, it was confirmed that the developed resin is available for realizing GHz-band high frequency MCM.
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Masafumi NIKAIDO, Masayuki YOJIMA, Hiromi TOKITA, Masayoshi IIDA
2000 Volume 3 Issue 2 Pages
127-131
Published: March 01, 2000
Released on J-STAGE: March 18, 2010
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Auto-Fault-Locating-System for mounting boards has been developed. In this system, faultpropagated nets are detected by comparing pulse-counts and voltages in good boards and fault ones under full power supply. And fault nets, which include the real fault origin, are located by tracing backward via a fault propagation path using the input-output attribute of terminals. With this system, IC functions are not necessary to locate faults and the number of measurement points is smaller than that of measuring all terminals. Measurement requires 1.5 seconds per net, and fault search requires 10-20 seconds. The system successfully located the fault origin in about 60 % of boards rejected in a functional test.
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Kazuo SHIMOYASHIKI, Nobuaki KITAZAWA, Yoshihisa WATANABE, Yoshikazu NA ...
2000 Volume 3 Issue 2 Pages
132-135
Published: March 01, 2000
Released on J-STAGE: March 18, 2010
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Effect of Cu addition on melting point, microstructure, wettability and peel strength between Sn-3.5mass%Ag solder and Au coated leadframe has been examined. The melting point was decreased to 218°C by Cu addition. Large Cu
6Sn
5 was preticipated in solders at 1.5mass% Cu addition. Wettability was good at 0.5mass% Cu addition. Peel strength was improved by 1.5mass% Cu addition due to the decrease in AuSn
4 in the solder.
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Hiroshi YAMADA, Takashi TOGASAKI, Kazushige OOI, Hajime SUDO
2000 Volume 3 Issue 2 Pages
136-142
Published: March 01, 2000
Released on J-STAGE: March 18, 2010
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Advanced three dimensional assembly technology for a high density CCD micro-camera system module has been developed by applying the module sidewall interconnection method. A copper wiring layer at the edge of the stacked substrates is exposed so that the footprint achieves sidewall interconnection. Devices of different sizes, each of which consists of CCD imaging data transmission circuits, are assembled by flip-chip technology on the stacked unit substrates. The high precision of distribution for the sidewall was achieved in order to make possible simultaneous stacking of plural substrates and application of Cu column solder bump for flip-chip interconnection. The fabricated three-dimensional module incorporates devices of different sizes and realizes the assembly density three times higher than that of a conventional module.
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Nobuaki HASHIMOTO
2000 Volume 3 Issue 2 Pages
143-147
Published: March 01, 2000
Released on J-STAGE: March 18, 2010
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A real Chip Size Package (CSP) of the face down type using ACF (Anisotropic Conductive Film) and PI substrate (Tape for Tape Automated Bonding), called “T-CSP (Tape-CSP) ”, has been developed. The Au-ball bumps that were formed on the LSI's Al electrodes were connected to Cu patterns on PI substrate using ACF. Solder balls were mounted into the through holes of PI substrate, after that, it's treated through each reflow process, cleaning, marking, and cutting. This T-CSP has many advantages ; the structure and the process are very simple. It can be applied an reel to reel line. So its cost also is lower than ordinary mold type ones. Furthermore, since the Robust design was performed and a high performance ACF was developed, T-CSP has very high reliability as LSI packages, that is, it clears both JEDEC level 1 tests, and also 1500 cycles of BLT (Board Level Thermal-Cycle Test) from-25 to + 125 degree C.
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Bo Xue DU, Shigeo KOBAYASHI
2000 Volume 3 Issue 2 Pages
148-152
Published: March 01, 2000
Released on J-STAGE: March 18, 2010
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Effects of relative angle between magnetic field and electrical field on insulation breakdown of PWB were investigated. The changes in number of drops to breakdown are dependent on relative angle under magnetic field as following.
(1) An angle as 0, 180 and 360 degree, the number of drops to insulation breakdown did not change at the relative angle, but the insulation breakdown became easy to progress as increasing density of magnetic field at the direction angle. In the case of 90 degree, as the density of magnetic field increased the number of drops to breakdown increased at both relative angle and direction angle. And, in the case of 270 degree, as the density of magnetic field increased the number of drops to breakdown decreased at both relative and direction angle.
(2) The relation of number between the drops to breakdown to scintillation discharge energy levels was more fully understood from the results of our wavelet analysis. The scintillation discharge levels under relative and direction angle at 270 degree was shown to increase over time compare with 0 and 90 degree.
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Yoshiaki MORI
2000 Volume 3 Issue 2 Pages
153-157
Published: March 01, 2000
Released on J-STAGE: March 18, 2010
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Kentaro ITO
2000 Volume 3 Issue 2 Pages
158-165
Published: March 01, 2000
Released on J-STAGE: March 18, 2010
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Kanji OTSUKA
2000 Volume 3 Issue 2 Pages
166-172
Published: March 01, 2000
Released on J-STAGE: March 18, 2010
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Atsushi INABA
2000 Volume 3 Issue 2 Pages
173-176
Published: March 01, 2000
Released on J-STAGE: March 18, 2010
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[in Japanese]
2000 Volume 3 Issue 2 Pages
178-179
Published: March 01, 2000
Released on J-STAGE: March 18, 2010
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[in Japanese]
2000 Volume 3 Issue 2 Pages
180-181
Published: March 01, 2000
Released on J-STAGE: March 18, 2010
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[in Japanese]
2000 Volume 3 Issue 2 Pages
182
Published: March 01, 2000
Released on J-STAGE: March 18, 2010
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[in Japanese]
2000 Volume 3 Issue 2 Pages
183
Published: March 01, 2000
Released on J-STAGE: March 18, 2010
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2000 Volume 3 Issue 2 Pages
184
Published: March 01, 2000
Released on J-STAGE: March 18, 2010
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