A new supply current test method is proposed for bridging faults in CMOS microprocessor based circuits which are implemented on printed circuit boards with discrete ICs. The method is based on supply current of a circuit under test, which flows when a test program is executed. A commercial microcomputer circuit is tested by the proposed method. In the tests, 98.7% of the bridging faults between two neighboring pins in the circuit are detected within 326 msec. It promises us that the method can be used in production tests of microprocessor based circuits. Also, it is shown that the test program can be developed by means of timing charts in data sheets of the microprocessor.

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A design method for quantitatively estimating the life of lead free solder joints in ball-grid-array-type packages under impact load was developed by an experimental result and a calculation of the finite element method. It was found that the interfacial stress between the solder and copper plating in the solder joints is the most important structural parameter in the life estimation of the solder joints. It was also found that the package structure, such as the layout of the solder bumps and the assembly temperature, has a significant effect on the life of the solder joints.

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[in Japanese]

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The high frequency characteristics of liquid crystal polymer (LCP) have been investigated using a microstrip line (MSL) on a silicon (Si) substrate to verify the possibility of the application of the material in millimeter-wave packaging. A LCP film was fabricated using a direct-bonding technique on Si substrate. Measured characteristics of insertion loss are compared between a LCP film and a SiO₂ film. The loss of the LCP-MSL is approximately 1/2 of that of the SiO₂-MSL. Moreover, a GaAs low noise amplifier (LNA) microwave monolithic integrated circuit (MMIC) was fabricated using a flipchip bonding technique on a LCP substrate to demonstrate an application for a millimeter-wave package. The measured output gain of the LNA package is over 11dB. The millimeter-wave LCP package is a promising technology in realizing low cost millimeter-wave radio equipment.

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We have presented R&D progress of our Three Dimensional Assembly Module called TZ-CSP (Tape Z-axis Chip Size Package) in our previous papers. In this presentation, we would like to present you improvement in assembly techniques and refinement in design parameters we have made in order to mass-produce TZ-CSP. Specific improvements are made to the key processes in TZ-CSP production such as tooling method and connecting method for inter-layer connection lead. Also, we have evaluated status of further functional improvements caused by SIP (System In Package) and Lead free solder. We also would like to present you the concept of trend towards SIP.

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Through chip electrodes with high aspect ratios used for three dimensional packaging can offer the shortest interconnection and reduce signal delay. Copper has good compatibility to conventional multi layer interconnection in LSI and BEOL (back end of line process) . In this work, filling vias with higher aspect ratio, 10μm in square and 70 μm in depth, used for through chip electrodes was investigated. Removing overhang at via top is important to achieve perfect via fill of 10 μm in square and 70 μm in depth. With testing a series of electrodeposition conditions, conformal electrodeposits were obtained. With those conformal electrodeposits, seams and voids always remain at the via center. Perfect via filling without seams or voids was achieved by increasing leveler of JGB concentration to 30 mg/L. The electrodeposition time was reduced to 3.5 hrs by using two steps pulse reverse current.

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