[in Japanese]

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In this paper, we propose a new placement method, which can treat of arbitrary shape blocks. In the proposed method, we place the blocks using the value that is based on the shape of block. The method is able to handle the blocks that include notches with restricted layout area. We can also search effective placements because the order of placement is controlled by Genetic Algorithm. We have made computer experiments by the automatic placement tool for proposed method. The computer experiments show that the results of proposed methods are effective placements without wasteful area.

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As the conductor density of the printed circuit boards increases with the demand for miniaturization of the electronic devices, the build-up method has been paid attention to achieve the requirement. The build-up method is a new manufacturing process accumulating an insulation layer and a conductive layer sequentially on the core circuit boards. The fundamental technologies such as selection of insulator, formation of via-holes and preparation of fine patterns are required to further improve this process. Among them, the adhesion strength between the copper conductor and insulation layer is significant to improve the connection reliability. This paper describes an improvement of adhesion strength between the copper and insulation layer using the additives in the electroless copper plating bath. Adhesion measurements were conducted using photoimageable resin and unclad resin. The adhesion strength was 1.14kgf/cm for the photoimageable resin and 1.43kgf/cm for the unclad resin with potassium thiocyanate added bath, with which tear fragments of the resin were observed on the detached copper side. On the other hand, the adhesion strength was not improved with additive-free and thiomalic acid added bath.

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It is known that multiple decoupling capacitors with series resistors, which can prevent impedance from increasing at the anti-resonance frequency, are effective for noise reduction at higher radio frequencies. Clock speed of a digital circuit now often exceeds 100MHz. Therefore, 3 or more decoupling capacitors are neccesary to reduce the radiation noise from such digital circuits. But in case of 3 decoupling capacitors with series resistors connected in parallel, it is impossible to solve the five-degree impedance equation analytically. The optimum value of the resistor to minimize the impedance is found with a circuit simulator and the results were convinced by measurements.

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This paper reviews a new packaging technique using Lead-less Super Broadband (LSuB) carrier for high-speed IC module. The LSuB carrier drastically reduces the parasitic inductive elements of the interconnection between IC and package terminals, and provides an impedance matched interconnection. The LSuB carrier realized the insertion loss of less than 1.3 dB from DC to 50 GHz. The fabricated package module using the LSuB carrier achieved a 3-dB bandwidth of more over 40 GHz.

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