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Article type: Cover
1996 Volume 20 Issue 55 Pages
Cover1-
Published: October 31, 1996
Released on J-STAGE: October 13, 2017
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Article type: Bibliography
1996 Volume 20 Issue 55 Pages
Misc1-
Published: October 31, 1996
Released on J-STAGE: October 13, 2017
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Article type: Index
1996 Volume 20 Issue 55 Pages
Toc1-
Published: October 31, 1996
Released on J-STAGE: October 13, 2017
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Atsushi Morimura, Takeo Azuma, Kenya Uomori
Article type: Article
1996 Volume 20 Issue 55 Pages
1-6
Published: October 31, 1996
Released on J-STAGE: October 13, 2017
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We have developed a wide dynamic range image processing technology. This technology compress video signal level preserving image contrast. Appling this technology to wide dynamic range images, contrast of the images which displayed on conventional display are improved. In this paper we discusse expression of wide dynamic range images, and propose video signal expression which is not in proportion to luminance. This new expression of video signal is obtained from divided region and edge base histogram equalization process.
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Takashi Sawaragi
Article type: Article
1996 Volume 20 Issue 55 Pages
7-12
Published: October 31, 1996
Released on J-STAGE: October 13, 2017
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We have developed the signal processing system for CCD Camera by using programmable Video Processor (SVP2). The functions of this system are luminance/Chrominance signal conversion, Optical Black level compensation. White Balance adjustment, False color suppression and Chrominance Matrix. The SVP2 is input a 8-bit data from CCD. and outputs video signals as YCrCb format. SVP2 is a single chip programmable video processor having 1024 processing elements operated as an SIMD parallel processor. They are operated line-by-line as a pipe-line manner for real-time video process.
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Masakazu Nanba, Toshio Yamagishi, Saburo Okazaki, Kenkichi Tanioka, No ...
Article type: Article
1996 Volume 20 Issue 55 Pages
13-18
Published: October 31, 1996
Released on J-STAGE: October 13, 2017
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A new pickup device having a unique structure is now in its first stage of development with the aim of producing a next-generation pickup device featuring compactness, super-high sensitivity and high definition. This new device combines a field emitter array with a HARP target (High-gain Avalanche Rushing amorphous Photoconductor), called the"flat image sensor". A prototype field emitter array for use in 5-inch displays was placed under a HARP target for use in a 2/3-inch pickup tube inside a vacuum chamber. A 30×30 pixel area of the field emitter array was operated to perform the pickup experiment. It was confirmed that the prototype device could operate as a high-sensitivity image sensor. The experiment also enabled us to evaluate basic characteristics and to clarify future research issues on this device.
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Takeo Sugawara, Tutomu Nagai, Tomoyuki Nakayama, Kazuaki Okumura, Tosh ...
Article type: Article
1996 Volume 20 Issue 55 Pages
19-24
Published: October 31, 1996
Released on J-STAGE: October 13, 2017
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We have developed the XRS-FOP (X-ray Radiation Shield Fiber Optic Plate) for CCD. The XRS-FOP absorb X-ray more than conventional FOP, decrease damages for CCD and reduce noise which cause by X-ray. We evaluated X-ray transmittance, coloring (Browning) by X-ray exposure and noise by X-ray exposure.
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Yoshio Hayasaki, Masahiko Mori, Nobuo Nishida
Article type: Article
1996 Volume 20 Issue 55 Pages
25-30
Published: October 31, 1996
Released on J-STAGE: October 13, 2017
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An optical method for converting an analog image to the digital images is proposed. The principle of the proposed method is based on intensity modulations of the input analog image and a thresholding for the modulated images. The optical realizing method is presented to a spatial method using plural spatial light modulators and a temporal method using short pulsed laser beam, high-speed shutter, and single spatial light modulator. The experiment setup based on the spatial method are constructed and the experimental resulats are presented.
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T. Hamamoto, Y. Ootuka, K. Aizawa, M. Hatori
Article type: Article
1996 Volume 20 Issue 55 Pages
31-36
Published: October 31, 1996
Released on J-STAGE: October 13, 2017
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For high frame rate or high resolution imaging, conventional image processing system has readout rate limitation and transfer rate limitaion. Video compression sensor overcomes these communication bottole necks by integration sensing and processing. In this paper, we propose a new architecture for the video compression sensor. The proposed architecture is separated into three parts (transducer, memory and processing) and each column has a processing element. We designed circuits and layout of a prototype using CMOS 1.0μm rule, it is verified that power dissipation and fill factor are significantly improved in comparison with pixel parallel architecture.
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Tooru ISHIZAKI, Li ZHENG, Kiyoharu AIZAWA, Mitsutoshi HATORI
Article type: Article
1996 Volume 20 Issue 55 Pages
37-42
Published: October 31, 1996
Released on J-STAGE: October 13, 2017
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In this paper we proposes a computational sensor in which motion vector detection is integrated on the sensor plane. Motion detection algorithm based on block matching. Output is motion vector for each pixel. In this paper, an algorithm and an architechture for motion vector detection are proposed and the prototype is presented. The chip is under fabrication on 1.5μm CMOS technology and chip size is 7mm×7mm. Processing unit consists of pixel parallel analog processor and column parallel digital processor.
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Takeyasu Sakai, Hiromasa Nagai, Takashi Matsumoto
Article type: Article
1996 Volume 20 Issue 55 Pages
43-48
Published: October 31, 1996
Released on J-STAGE: October 13, 2017
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A reset circuitry is proposed for compensating various offset effects in the multi-input floating gate differential amplifler (FGDA). The latter is a basic building block for intelligent image sensors proposed by the present authors in a previous paper.
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Article type: Appendix
1996 Volume 20 Issue 55 Pages
App1-
Published: October 31, 1996
Released on J-STAGE: October 13, 2017
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