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Article type: Cover
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Published: December 10, 2009
Released on J-STAGE: September 20, 2017
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Article type: Index
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Published: December 10, 2009
Released on J-STAGE: September 20, 2017
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Sanshiro Shishido, Yasuhiro Oguro, Toshihiko Noda, Kiyotaka Sasagawa, ...
Article type: Article
Session ID: IST2009-90
Published: December 10, 2009
Released on J-STAGE: September 20, 2017
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When an operation of epilepsy to remove an epileptic focus, electroencephalogram (EEG) recordings by using disc electrodes placed on the brain surface are usually performed. It is important to compare a number of measurement results of the brain functions for reliability improvement. Based on such backgrounds, we propose and develop a multi-functional CMOS image sensor device for imaging of brain activities by an adoption of an optical imaging method which is one of the in vivo recording methods. In this report, we describe the design details and characterization of the sensors.
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Sousuke Shimoyama, Masayuki Ikebe, Masaki Igarashi, Junichi Motohisa
Article type: Article
Session ID: IST2009-91
Published: December 10, 2009
Released on J-STAGE: September 20, 2017
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Local Histogram Equalization (LHE), which is efficient for High Dynamic Range (HDR) compression, requires a large amount of calculation and induces unnatural image quality. Using checker-wise histogram acquisition and line buffer, memory accessing for local histograms is processed in O(1) time. Moreover, for improving image quality, we proposed approximation of LHE by compositing gamma functions. Setting parameters to each luminance tone, image quality is regulated adaptively. Using C++, we achieved two million pixels per 0.3sec operation and real-time VGA movie processing.
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Toshitaka KUWA, Yoshihiro WATANABE, Takashi KOMURO, Masatoshi ISHIKAWA
Article type: Article
Session ID: IST2009-92
Published: December 10, 2009
Released on J-STAGE: September 20, 2017
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In this paper, we propose wide-range image sensing using a thrown-up camera. By throwing up a camera, we suppose that we can get images which are difficult to get before. And we also propose to use a high frame rate camera as a thrown-up camera in order to get much information. We confirmed that we can get information from a thrown-up camera by image mosicing. We conducted an experiment to proof the necessity of a high frame rate camera. And we confirmed the necessity.
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Takumi HIRAGA, Toshinori OTAKA, Takayuki HAMAMOTO
Article type: Article
Session ID: IST2009-93
Published: December 10, 2009
Released on J-STAGE: September 20, 2017
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In this paper, we propose an object tracking scheme for high-speed image sensor of which the reading area can be controlled block by block. The method of object tracking is based on the motion vector which is calculated from the center of gravity position of the object between two continuous frames. In addition, three-dimensional location information can be obtained by focus control to a target object.
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Kenichiro ZAITSU, Youngjae KIM, Yasutaka KURIYA, Takashi MORIE
Article type: Article
Session ID: IST2009-94
Published: December 10, 2009
Released on J-STAGE: September 20, 2017
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The edge information of contours in natural images is often lacked due to poor contrast with the background and illumination conditions, which may cause incorrect recognition results. However, even in such cases, human can recognize an object by generating imaginary contours, which is known as subjective contours. This paper proposes a real-time image processing system using a dedicated LSI chip that performs anisotropic diffusion processes with pixel-parallel operation based on merged analog-digital architecture for edge completion. The dedicated LSI chip is controlled by an FPGA connected with a PC and a camera. We show experimental results of subjective-contour generation in the Kanizsa triangle and reconstruction of occluded contours using our system.
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Shun KAWADA, Shin SAKAI, Nana AKAHANE, Rihito KURODA, Shigetoshi SUGAW ...
Article type: Article
Session ID: IST2009-95
Published: December 10, 2009
Released on J-STAGE: September 20, 2017
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We have developed a WRGB CMOS image sensor with lateral overflow integration capacitor (LOFIC) technology in order to achieve almost the same saturation exposure with wide dynamic range. The WRGB LOFIC CMOS image sensor with a 1/3.3-inch optical format, 1280^H×480^V pixels, 4.2-μm effective pixel pitch with 45° direction was designed and fabricated through 0.18-μm 2-Poly 3-Metal CMOS technology with buried pinned photodiode process. This image sensor has achieved about 108-μV/e^- high conversion gain and about 102-dB dynamic range performance in one exposure.
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Shoko TAKENAGA, Koichi OKUMURA, Fumio MIZUTANI, Makoto ISHIDA, Kazuaki ...
Article type: Article
Session ID: IST2009-96
Published: December 10, 2009
Released on J-STAGE: September 20, 2017
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32×32 acetylcholine (ACh) image sensors using enzyme-immobilized polyion complex membrane were successfully required real time imaging of ACh distribution with better stability and improve responsibility. Nowadays, acetylcholine imaging technology has a lot of potential for human activity analysis and localization of disease. The proposed Charge-Transfer Technique ACh Image Sensor (CTTAIS) is a very unique device due to not only determine quantity but also acquire real time imaging of behavior of biological matter without label.
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Tomohira TABATA, Takashi KOMURO, Masatoshi ISHIKAWA
Article type: Article
Session ID: IST2009-97
Published: December 10, 2009
Released on J-STAGE: September 20, 2017
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We demonstrate surface-image synthesis of moving, spinning cylindrical objects using a commercially available high-speed area scan camera. The frame rate used in the demonstration experiment was 1,000fps, which is sufficient to achieve synthesis of cylinders spun at up to 36rps. We successfully demonstrated an algorithm similar to image mosaicmg at 1,000fps, for the first time to the best of our knowledge. We discuss techniques to overcome the potential problems such as image distortion and quantization errors due to superimposing images, and intensity variations due to the surface curvature. A FPGA-based parallel image processing board, PB-1, that we developed was used to implement these demonstrations.
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Article type: Appendix
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Published: December 10, 2009
Released on J-STAGE: September 20, 2017
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Article type: Appendix
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Published: December 10, 2009
Released on J-STAGE: September 20, 2017
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Article type: Appendix
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Published: December 10, 2009
Released on J-STAGE: September 20, 2017
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