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39.16
Displaying 1-19 of 19 articles from this issue
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Article type: Cover
Pages Cover1-
Published: March 20, 2015
Released on J-STAGE: September 22, 2017
CONFERENCE PROCEEDINGS FREE ACCESSDownload PDF (10K) -
Article type: Index
Pages Toc1-
Published: March 20, 2015
Released on J-STAGE: September 22, 2017
CONFERENCE PROCEEDINGS FREE ACCESSDownload PDF (76K) -
Toshiki Kainuma, Atsushi Suzuki, Nobutaka Shimamura, Naoki Kawazu, Chi ...Article type: Article
Session ID: IST2015-10
Published: March 20, 2015
Released on J-STAGE: September 22, 2017
CONFERENCE PROCEEDINGS FREE ACCESSWe have developed a 1/1.7-inch 20Mpixel back-illuminated stacked CMOS image sensor with parallel multiple sampling, two simultaneous output streams and data compression. The sensor achieves RMS random noise of 1.3e-rms with parallel multiple sampling, and 16Mpixel at 120fps with an interface of 2.3Gbps/lane and 8 lanes with visually lossless data compression. Moreover, two simultaneous output streams of 4Mpixel and 16Mpixel at 60fps are achieved by two Tx-Links. Imaging applications will be created by using this sensor, which achieves low noise, high speed, high resolution, and dual recoding functionality.View full abstractDownload PDF (5615K) -
Masahide GOTO, Kei HAGIWARA, Yoshinori IGUCHI, Hiroshi OHTAKE, Takuya ...Article type: Article
Session ID: IST2015-11
Published: March 20, 2015
Released on J-STAGE: September 22, 2017
CONFERENCE PROCEEDINGS FREE ACCESSWe report the first demonstration of three-dimensional (3D) integrated CMOS image sensors with pixel-parallel A/D converters (ADCs), thereby meeting the demand for high resolution and high frame rate imaging. Photodiode (PD) and inverter layers were directly bonded with the damascened Au electrodes to provide each pixel with in-pixel A/D conversion. We designed ADC with a pulse frequency output and fabricated a prototype sensor with 64 pixels. The developed sensor successfully captured video images and confirmed excellent linearity with a wide dynamic range of more than 80 dB, which showed feasibility of pixel-level 3D integration for high-performance CMOS image sensors.View full abstractDownload PDF (9906K) -
Yuichi NONAKA, Daisuke YOSHIDA, Shinichiro HIROOKAArticle type: Article
Session ID: IST2015-12
Published: March 20, 2015
Released on J-STAGE: September 22, 2017
CONFERENCE PROCEEDINGS FREE ACCESSThis paper presents the new noise reduction algorithm based on human visual characteristics for color images. Based on an inverse correlation between edge signal intensity and noise visibility, the noise reduction strength of our algorithm is controlled adaptively according to edge signal intensity in units of pixels. The relational expression between edge signal intensity and noise visibility was obtained experimentally. The result of evaluation by image simulation showed that both high resolution and low noise can be realized using our proposed method.View full abstractDownload PDF (9600K) -
Takuro OHMARU, Takashi NAKAGAWA, Shuhei MAEDA, Yuki OKAMOTO, Munehiro ...Article type: Article
Session ID: IST2015-13
Published: March 20, 2015
Released on J-STAGE: September 22, 2017
CONFERENCE PROCEEDINGS FREE ACCESSWe have fabricated a vision sensor with in-pixel non-volatility analog memory using a c-axis aligned crystalline oxide semiconductor FET that demonstrates very low off-state current. The pixel is possible to retain not only capturing image data but also differential image data of a given reference flame for a long time. Thus, the vision sensor can realize normal image capturing and extracting a differential image by an electronic global shutter, and motion capturing by judging the presence or absence of differences. Furthermore, it has three modes of operations, and can reduce power consumption by power gating idling blocks in each mode.View full abstractDownload PDF (4684K) -
Hiroki YABE, Makoto IKEDAArticle type: Article
Session ID: IST2015-14
Published: March 20, 2015
Released on J-STAGE: September 22, 2017
CONFERENCE PROCEEDINGS FREE ACCESSTheoretical performance analysis of our proposed CMOS image sensor that performs binary/linear search on the pixel array is presented. The line position output of the search circuit has a systematic error that results from non-ideality of minimum voltage circuit as well as the variation of transistors and noise. The precision of our proposed method is compared to that of conventional gravitational center method. Evaluation based on numerical simulations shows that our proposed method is effective, and introduction of linear search improves the line detection accuracy by the factor of up to 70 compared to when we only use binary search.View full abstractDownload PDF (643K) -
Takahiko MATSUSHIMA, Makoto IKEDAArticle type: Article
Session ID: IST2015-15
Published: March 20, 2015
Released on J-STAGE: September 22, 2017
CONFERENCE PROCEEDINGS FREE ACCESSA CMOS image sensor for 3D range map acquisition by binning of lock-in pixels is presented. A pixel of the presented sensor is consisted of two pairs of lock-in pixel which share one of floating diffusions. Our sensor improves the efficiency of speed and area in Time-of-Flight measurement which uses modulated light and lock-in pixels. The sensor also can be applied to Light-Section measurement by adding some processing circuits. By measurement of a trial chip and simulation, the accuracy in ToF mode has been estimated as 16.8cm (@100cm, 60 fps) and the accuracy of the sheet light position detection has been estimated as 0.46 of pixel width.View full abstractDownload PDF (4001K) -
Bo ZHANG, Keiichiro KAGAWA, Taishi TAKASAWA, Min-Woong SEO, Keita YASU ...Article type: Article
Session ID: IST2015-16
Published: March 20, 2015
Released on J-STAGE: September 22, 2017
CONFERENCE PROCEEDINGS FREE ACCESSTo reduce the random telegraph signal (RTS) noise and dark current in extremely low-light conditions as well as to increase the number of incident photons, the multi-aperture imaging system with a selective averaging method has been proposed. In this work, an ultra-high-sensitivity multi-aperture color camera with 2×2 apertures is being developed. In the prototype camera, low-noise color sensors with 1280×1024 effective pixels fabricated in 0.18um CIS technology are utilized. The pixel pitch is 7.11μm×7.1μm. The noise of the sensor is around le- based on the folding-integration and cyclic column ADCs, and the low voltage differential signaling (LVDS) is used to improve noise immunity. The synthetic F-number of the prototype camera is 0.6. In the simulation, the effective noise at the peak of noise histogram is reduced from 1.44 e- to 0.73 e- in a 2×2-aperture system, where RTS noise and large dark current have been successfully removed.View full abstractDownload PDF (17640K) -
Shigeyuki IMURA, Kenji KIKUCHI, Kazunori MIYAKAWA, Hiroshi OHTAKE, Mis ...Article type: Article
Session ID: IST2015-17
Published: March 20, 2015
Released on J-STAGE: September 22, 2017
CONFERENCE PROCEEDINGS FREE ACCESSWe have developed an image sensor overlaid with a thin-film crystalline selenium (c-Se)-based heterojunction photodiode. We herein present the first high-resolution images obtained with such a device by decreasing a size of particles much smaller than the pixel size. Furthermore, the dark current was significantly decreased by using an n-type wide-band-gap gallium oxide (Ga_2O_3) layer as a high hole-injection barrier.View full abstractDownload PDF (7615K) -
Hironari TAKEHARA, Mizuki NAGASAKI, Kiyotaka SASAGAWA, Hiroaki TAKEHAR ...Article type: Article
Session ID: IST2015-18
Published: March 20, 2015
Released on J-STAGE: September 22, 2017
CONFERENCE PROCEEDINGS FREE ACCESSEnzyme-linked immunosorbent assay(ELISA) is a diagnosis method which is used for detecting viruses or tumor markers. A combination of antigen-antibody reactions and fluorescent reactions are utilized in ELISA. Recently, digital ELISA has been proposed to achieve higher sensitivity. We have been developing compact digital ELISA system by replacing a fluorescent microscope with a CMOS image sensor as a fluorescence detection tool. In this report, stacked photodiode CMOS image sensor for discriminating fluorescence from excitation light is proposed. A light pipe array filled with absorption filter which has high fluorescence coupling efficiency is also described.View full abstractDownload PDF (3500K) -
Min-Woong SEO, Keiichiro KAGAWA, Keita YASUTOMI, Yoshimasa KAWATA, Nob ...Article type: Article
Session ID: IST2015-19
Published: March 20, 2015
Released on J-STAGE: September 22, 2017
CONFERENCE PROCEEDINGS FREE ACCESSA high time-resolution low-noise CMOS lock-in pixel image sensor with embedded storage diodes and lateral electric field charge modulation method is developed for time-resolved imaging. The developed time-resolved CMOS image sensor achieves extremely high time resolution of 10.8ps, very short intrinsic response time of 180ps at 374nm, and very low temporal random noise of 1.7 e-RMS with true CDS operation. This paper introduces and demonstrates a custom CMOS imager for fluorescence lifetime imaging with its measurement results.View full abstractDownload PDF (3954K) -
Shunichi WAKASHIMA, Fumiaki KUSUHARA, Rihito KURODA, Shigetoshi SUGAWAArticle type: Article
Session ID: IST2015-20
Published: March 20, 2015
Released on J-STAGE: September 22, 2017
CONFERENCE PROCEEDINGS FREE ACCESSThis paper reports that the floating capacitor load readout operation has higher pixel signal readout gain and wider linear response range than conventional readout operation, and the reason. We fabricated the prototype chip which has 1140^Hx768^V pixels of 2.8 μm pitch with 2 shared pixel technology and verified the effectiveness. When the power supply voltage is 2.0V, floating capacitor load readout operation increases readout gain by 8 % and enlarges linear response range by 47 % in comparison to conventional readout operation using column current source.View full abstractDownload PDF (12171K) -
Futa MOCHIZUKI, Keiichiro KAGAWA, Shin-ichiro OKIHARA, Min-Woong SEO, ...Article type: Article
Session ID: IST2015-21
Published: March 20, 2015
Released on J-STAGE: September 22, 2017
CONFERENCE PROCEEDINGS FREE ACCESSWe propose a ultra-high-speed CMOS image sensor based on the multi-aperture structure. Every aperture is operated with a different shutter pattern and accumulates temporally-multiplexed signals in pixel. After that, temporally-resolved ultra-high-speed images are reproduced by solving an inverse problem using the given shutter patterns and a captured multi-aperture image. The time resolution is determined only by on-stage charge transfer time and the clock skew between the apertures. Therefore, we believe that the proposed method realizes the fastest frame rate.View full abstractDownload PDF (3811K) -
K. Shimonomura, T. G. Etoh, V. T. S. Dao, E. Charbon, C. Zhang, Y. Kam ...Article type: Article
Session ID: IST2015-22
Published: March 20, 2015
Released on J-STAGE: September 22, 2017
CONFERENCE PROCEEDINGS FREE ACCESSEvolution of ultra-high-speed image sensors is reviewed. Currently, the highest frame rate achieved by a solid-state image sensor is 16.7 Mfps, while the target of this project is 1 Gfps. To achieve this target, we propose an image sensing unit consisting of CCD pixels and a CMOS driver circuit, whereas the pixel has multiple collection gates, and the driver comprises a ring oscillator with XNOR circuits. The sensor and the driver are mounted on different IC chips by 3D stacking. Simulations confirm that the proposed technology achieves the target.View full abstractDownload PDF (729K) -
Ryohei FUNATSU, Steven HUANG, Takayuki YAMASHITA, Takuji SOENO, Tomohi ...Article type: Article
Session ID: IST2015-23
Published: March 20, 2015
Released on J-STAGE: September 22, 2017
CONFERENCE PROCEEDINGS FREE ACCESSWe have developed a 133Mpixel 60fps CMOS image sensor to realize a compact, full-resolution single-chip 8K Super Hi-Vision camera. The image size is equivalent to that of 35-mm full-frame lenses and the pixel size is 2.45μm. Bayer color filter array is adopted and each color has over 33-million pixels, which are equal to the number of pixels for 8K full-resolution. To achieve high speed readout with 60fps, 14b high-speed redundant successive approximation register (SAR) ADCs are adopted. As a result, a full-size image with over 4000 TV lines resolution has been captured.View full abstractDownload PDF (5257K) -
Article type: Appendix
Pages App1-
Published: March 20, 2015
Released on J-STAGE: September 22, 2017
CONFERENCE PROCEEDINGS FREE ACCESSDownload PDF (81K) -
Article type: Appendix
Pages App2-
Published: March 20, 2015
Released on J-STAGE: September 22, 2017
CONFERENCE PROCEEDINGS FREE ACCESSDownload PDF (81K) -
Article type: Appendix
Pages App3-
Published: March 20, 2015
Released on J-STAGE: September 22, 2017
CONFERENCE PROCEEDINGS FREE ACCESSDownload PDF (81K)
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