Compound semiconductor electronic devices have the capability to provide high-speed operation as they have higher mobility than Si. At present, compound semiconductor devices are popular as parts of consumer electronics such as wireless communication devices or satellite television. Introduction of wide bandgap compound semiconductors has increased the use of compound semiconductor devices in base stations of cellular phone systems and as replacements for vacuum tubes. More recently, the research on InGaAs MOSFET has been directed towards realization of its potential as an alternative for silicon.
This review explains the present commercialization of compound semiconductor devices in consumer electronics, and its state-of-art results such as the 529-GHz dynamic frequency divider using InGaAs heterojunction bipolar transistors, the 1-THz amplification provided by the InGaAs high–electron-mobility transistor (HEMT), and the power of 3 Wmm−1 provided by the GaN HEMT at 96 GHz. The InGaAs MOSFET as the next candidate for logic circuit components, is also explained.
Communications traffic over photonic networks is exponentially increasing due to the spread of broadband applications. To cope with the rapid growth, novel 100-Gb/s digital coherent systems have been deployed recently in optical core networks. Further research and development of digital coherent technologies with channel rates of beyond 100 Gb/s is now being conducted. Optical transceivers for such high-speed communications systems need high-performance analog and mixed-signal electronic circuits such as optical modulator drivers, transimpedance amplifiers (TIAs), analog-to-digital converters (ADCs), and digital-to-analog converters (DACs). Compound-semiconductor integrated circuits (ICs) have played key roles in this technical field. This paper reviews recent trends in compound-semiconductor ICs for such advanced digital coherent optical communications systems and presents our latest results based on InP heterojunction bipolar transistor (HBT) technology.
This paper presents a proposal and an experimental analysis of behavioral emulator of so-called z-copy controlled-gain voltage differencing current conveyor (ZC-CG-VDCC) based on commercially available devices. Most of them are electronically (by DC voltage) controllable. This work represents a suitable example of preliminary stage of development of an active device before its fabrication on silicon. This approach of development provides certain and significant information about basic functionality of the active device or the whole application and proves expected theory. The particular results of tested ZC-CG-VDCC implementation in frequency domain (transfers, gains, impedances) and DC domain (dynamics, linearity) are shown.
A novel method for enhancing the directivity of coupled-line directional couplers is presented. In a coupled-line directional coupler formed on thin multi-layered substrates, it is difficult to match the coupled-line characteristic impedance with the load impedance. This impedance mismatch causes forward coupling in the directional coupler, thus degrading the directivity. This method utilizes reverse-phase forward coupling with an additional coupled line to cancel the undesired forward coupling due to the primary coupled line. It has been experimentally verified that the directivity of the proposed 20-dB coupler is increased by 13 dB at 840 MHz in comparison with the conventional coupler.
The evolution of electromagnetic field profile of LP modes along with the propagation owing to the difference of propagation constants between constituent true eigenmodes is accurately analyzed. It is shown that the mode demultiplexer can’t accurately discriminate the LP mode at the output end and so the MIMO-DSP is inevitable for the mode division multiplexed transmission using LP modes. From the accurate analysis, a transform matrix between LP modes and constituent true eigenmodes is derived and a novel method to configure true eigenmode multi/demultiplexer is proposed to realize MIMO-free transmission.
In this paper, a novel approach, which combines color transformation and dimming synergistically with respect to both power saving and image quality, is proposed for thin film transistor liquid crystal displays (TFT LCDs). This approach adaptively selects an allowable perceptual value that depends on the luminance value of an image (or frame) and dims the backlight based on it. The technique is implemented using an image viewer and a video playback program on an LED backlight unit-based TFT LCD board. Experimental results show that the proposed approach achieves on average 34.5% and 21.19% power savings for still images and video files, respectively, without affecting the visual quality of the images and with an overhead of 4.09% for video files.
A comparison between commercially available transmission terahertz spectroscopy systems using photoconductive antennas owned by three participating institutions was performed to verify the effects of the specifications of each system on the transmittance measurement uncertainty. Three types of sample with different compositions and shapes were circulated around the participating institutions, and the data obtained from their systems were compared. We verified that sample thickness and its non-parallelism affected measurement data by carrying out measurements and calculations. On the basis of the components of variations in the measurement data, we tried to classify the five measurement data sets. The results indicated that the system users can easily compare their measurement conditions with those of other systems using statistical analysis.
Hotspots and voltage droops have become critical problems during scan test. They are minimized by dynamically varying clock frequency during scan shift operation. We control average and peak temperature by adjusting the clock frequency assigned to each core. This proposed method is applied to multi-core System-on-Chip (SoC). Experimental results show that our method achieves 28% peak temperature reduction and 38% average temperature reduction.
This letter presents a novel planar tri-band bandpass filter (BPF) using a set of stepped-impedance resonators (SIRs) and a short-circuited stub-loaded uniform impedance resonator. The former is designed to operate at the first and third passbands and the latter at the second passband. Corresponding equivalent circuit is analyzed by using the even-odd mode theory. Skirt selectivity is obtained due to source-load coupling. For validation, a tri-band BPF with compact size is designed, fabricated, and measured, its center frequencies are located at 2.4, 3.5, 5.15 GHz. Measured results show good performance on insertion loss and return loss.
This paper proposes novel formulas for the calculation of the parasitic inductance of Tapered-Through Silicon Vias (T-TSVs), considering the TSVs located in adjacent layers. The formulas can not only be reduced to calculate the self-partial inductance and mutual-partial inductance of T-TSVs located in the same layer but also be used for cylindrical TSVs when the slope angle is 90°. The comparison between the results of the proposed formulas and Ansoft Q3D shows that the proposed formulas have very high accuracy with a maximum error of 2.5%.
Multi-scenario high-level synthesis for distributed register/controller architecture has been proposed targeting static delay variation. In this paper, we extend it and propose a floorplan-driven high-level synthesis algorithm which can be applied to dynamic delay variation by effectively using an error prediction technique, where pre-error registers are introduced to local registers in every circuit block. Experimental results show that the proposed algorithm using two and three scenarios on an FPGA chip reduces the average number of required control steps by 17.6% and 25.5% on average compared to worst-case high-level synthesis at the expense of increasing lookup-tables and flip-flops. Moreover, we implement a multi-scenario elliptic-wave-filter (EWF) circuit with three scenarios synthesized by our proposed algorithm onto an FPGA chip and run it under the environment with varying supply voltages which causes dynamic delay variation. The FPGA implementation experiments also demonstrate that the EWF circuit effectively runs on the real FPGA chip. As far as we know, this is the world-first experiment where a multi-scenario circuit runs under real dynamic delay variation environment.
A multibank memory structure is introduced for mixed radix FFT algorithms to improve the real-time performance. In this structure, only one butterfly unit implementing mixed radix butterfly computation is required and the FFT computation keeps continuous. At last, comparisons are made to prove that the method in this paper is valid.
As the bit-line leakage increases, the performance of SRAM will decline. Especially, the read operation will even fail when the amount of the leakage reaches a critical value. In this paper, we present a new technique, called Additive Calibration (AC), which can combat the bit-line leakage problem even in low voltage. Simulation results show that the maximum tolerant bit-line leakage current of our AC scheme is increased by 45.6% compared with the previous X-calibration scheme. Thus, this method can perform at higher frequency with much lower power consumption.
A 5th-order Chebyshev active-RC filter has been implemented in TSMC 0.13µ CMOS technology. With the feature of multi-mode, it has 8 different bandwidth modes including 6 Real Low-pass modes and 2 Complex band-pass modes for wireless sensor network applications. Combined with a special kind of Miller compensation method, the OTA’s stability is observably improved. Also, to eliminate the effect of temperature and process variation, an automatic frequency tuning scheme is applied. The filter measures a 0 dB gain and 0.9 dB ripple in passband. It also measures an input-referred noise of and in-band-IIP3 of 25 dBm while consuming 15 mA current from 1.3 V supply. The tuning circuit has a precision of 2% and covers a range of 30%.
In this paper a Lorentz force driven Micro ELectro Mechanical Sytems (MEMS) resonator fabricated on PolyMUMP process with optical and capacitive sensing is presented. The resonator is designed by combining the two poly layers which result in an increase in the thickness of the resonator. Lorentz force generates lateral displacements at low driving voltages which are proportional to the magnetic field and the input current. A displacement of more than 9.8 µm was achieved with a magnetic field of 0.12 T and a driving current of 27 mA. Magnetic sensitivity of 1.41 V/T in air was experimentally measured using permanent magnets and capacitive sensing circuitry. Optical results demonstrate the sensitivity values between 0.090 µm/mT and 0.074 µm/mT.
Optical Network-on-Chip (ONoC) is a promising on-chip communication architecture for future many-core systems due to its high-performance and energy-efficient characteristics. However, the crosstalk problem is an obstacle to the realization of ONoC. In large scale ONoC, the crosstalk noise considerably reduces data transmission reliability via the signal-to-noise ratio (SNR), and limits the scalability of ONoC. In this letter, we propose a crosstalk-aware wavelength assignment (CWA) method to mitigate the crosstalk problem. Analyses results indicate that our CWA method significantly improves the worst-case SNR and allows a higher network scalability.